Schottky barrier diode
Patent Information
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2022-02-14
- Publication Date
- 2022-10-01
Smart Images

Figure TWG2TA000877622_001 
Figure TWG2TA000877622_002 
Figure TWG2TA000877622_003
Abstract
Description
[Technical Field]
[0001] This invention relates to a Schottky barrier diode, and more particularly to a Schottky barrier diode using gallium oxide. [Previous Technology]
[0002] Schottky barrier diodes are rectifiers that utilize the Schottky barrier created by the junction of a metal and a semiconductor. Compared to conventional diodes with PN junctions, they have lower forward voltage and faster switching speed. Therefore, Schottky barrier diodes are sometimes used as switching elements in power devices.
[0003] When Schottky barrier diodes are used as switching elements for power devices, sufficient reverse withstand voltage must be ensured. Therefore, silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), etc., with larger band gaps are sometimes used instead of silicon (Si). Among them, gallium oxide has a very large band gap of 4.8 to 4.9 eV and a relatively large insulation breakdown electric field of about 8 MV / cm. Therefore, Schottky barrier diodes using gallium oxide are very promising as switching elements for power devices. An example of using a Schottky barrier diode using gallium oxide is described in Patent Document 1.
[0004] The Schottky barrier diode described in Patent Document 1 has the following structure: a plurality of trenches are formed in a gallium oxide layer, and a portion of the anode electrode is buried in the trenches through an insulating film. Thus, if a plurality of trenches are formed in the gallium oxide layer, the mesa region between the trenches becomes a depletion layer after a reverse voltage is applied, thereby interrupting the channel region of the drift layer. This significantly suppresses leakage current when a reverse voltage is applied. [Prior Art Documents] [Patent Documents]
[0005] [Patent Document 1] Japanese Patent Application Publication No. 2017-199869 [Summary of the Invention]
[0006] (The problem that the invention aims to solve)
[0007] However, in the conventional Schottky barrier diode with grooves, there is a problem that if a reverse voltage is applied, the electric field is concentrated at the bottom of the outermost groove, where insulation is easily damaged.
[0008] Therefore, the object of the present invention is to prevent insulation failure in a Schottky barrier diode using gallium oxide by mitigating the electric field generated when a reverse voltage is applied. (Technical means to solve the problem)
[0009] The Schottky barrier diode of the present invention is characterized in that it comprises: a semiconductor substrate containing gallium oxide; a drift layer containing gallium oxide disposed on the semiconductor substrate; an anode electrode that makes Schottky contact with the drift layer; a cathode electrode that makes ohmic contact with the semiconductor substrate; and an insulating film that covers the inner wall of a trench disposed in the drift layer; the trench includes an annular peripheral trench and a central trench formed in a region surrounded by the peripheral trench; a portion of the anode electrode is embedded in the peripheral trench and the central trench through the insulating film; the insulating film is thickened in the depth direction of the peripheral trench as it faces outward, thereby the outer peripheral wall of the anode electrode embedded in the peripheral trench has a curved shape that is nearly vertical as it faces outward.
[0010] According to the present invention, the outer peripheral wall of the anode electrode embedded in the outer peripheral trench has a curved shape that is close to vertical as it moves outward, so as to mitigate the electric field generated at the bottom of the outer peripheral trench when a reverse voltage is applied.
[0011] In this invention, the inner peripheral wall of the anode electrode embedded in the outer peripheral groove can be closer to vertical than the outer peripheral wall. This allows for a reliable clamping of the mesa region between the central groove and the outer peripheral groove.
[0012] In this invention, the width of the peripheral groove can also be wider than the width of the central groove. This can further mitigate the electric field generated at the bottom periphery of the peripheral groove.
[0013] In this invention, the peripheral groove may also be deeper than the central groove. This can further mitigate the electric field generated at the bottom periphery of the peripheral groove.
[0014] In this invention, the surface above the drift layer located outside the peripheral groove can also be covered by an insulating film. Thus, the surface above the drift layer is protected by an insulating film.
[0015] In this invention, the portion of the insulating film covering at least the inner wall of the outer peripheral groove can also have a multilayer structure. This makes it easier to adjust the thickness or properties of the insulating film. (Effects compared to prior art)
[0016] Thus, according to the present invention, the electric field generated when a reverse voltage is applied can be mitigated, thereby preventing the insulation failure of the Schottky barrier diode using gallium oxide.
Implementation Method
[0018] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
[0019] <First Embodiment> FIG1 is a schematic top view showing the configuration of the Schottky barrier diode 11 according to the first embodiment of the present invention. FIG2 is a schematic cross-sectional view along line AA shown in FIG1.
[0020] As shown in Figures 1 and 2, the Schottky barrier diode 11 of this embodiment includes a semiconductor substrate 20 and a drift layer 30, both of which contain gallium oxide (β-Ga2O3). Silicon (Si) or tin (Sn) is introduced into both the semiconductor substrate 20 and the drift layer 30 as an n-type dopant. Regarding the concentration of the dopant, the semiconductor substrate 20 has a higher concentration than the drift layer 30. Therefore, the semiconductor substrate 20 functions as an n+ layer, and the drift layer 30 functions as an n- layer.
[0021] The semiconductor substrate 20 is formed by cutting a bulk crystal formed using a melt growth method or the like, and its thickness is about 250 μm. There is no particular limitation on the planar dimensions of the semiconductor substrate 20, but it is generally selected based on the amount of current flowing to the device. If the maximum forward current is about 20 A, then it is sufficient to set it to about 2.4 mm × 2.4 mm when viewed from above.
[0022] The semiconductor substrate 20 has an upper surface 21 located on the upper surface side during mounting, and a back surface 22 located on the lower surface side during mounting, opposite to the upper surface 21. A drift layer 30 is formed on the entire surface of the upper surface 21. The drift layer 30 is a thin film epitaxially grown on the upper surface 21 of the semiconductor substrate 20 using reactive sputtering, PLD (Pulsed Laser Deposition), MBE (Molecular Beam Epitaxy), MOCVD (Metal Organic Chemical Vapor Deposition), and HVPE (Hydride Vapor Phase Epitaxy). The thickness of the drift layer 30 is not particularly limited, but it is generally selected according to the reverse breakdown voltage of the device. To ensure a breakdown voltage of about 600 V, for example, it can be set to about 7 μm.
[0023] An anode electrode 40 is formed on the upper surface 31 of the drift layer 30, making a Schottky contact with the drift layer 30. The anode electrode 40 may contain metals such as platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), molybdenum (Mo), and copper (Cu). The anode electrode 40 may also be a multilayer structure formed by laminating different metal films, such as Pt / Au, Pt / Al, Pd / Au, Pd / Al, Pt / Ti / Au, or Pd / Ti / Au. On the other hand, a cathode electrode 50 is provided on the back surface 22 of the semiconductor substrate 20, making an ohmic contact with the semiconductor substrate 20. The cathode electrode 50 may contain metals such as titanium (Ti). The cathode electrode 50 may also be a multilayer structure formed by laminating different metal films, such as Ti / Au or Ti / Al.
[0024] In this embodiment, trenches 61 and 62 are provided in the drift layer 30. Both trenches 61 and 62 are positioned overlapping the anode electrode 40 when viewed from above. Trench 61 is formed as an annular outer peripheral trench, and trench 62 is formed as a central trench in the area surrounded by the outer peripheral trench. The outer peripheral trench 61 and the central trench 62 do not need to be completely separated; as shown in Figure 1, they can also be connected. In this embodiment, the outer peripheral trench 61 and the central trench 62 have the same depth.
[0025] The inner walls of trenches 61 and 62 are covered by an insulating film 63 containing HfO2, etc., and the interiors of trenches 61 and 62 are filled with the same material as the anode electrode 40 through the insulating film 63. In this embodiment, a plurality of trenches 61 and 62 are provided in the drift layer 30, so the material of the anode electrode 40 can also be a material with a low working function, such as molybdenum (Mo) or copper (Cu). Furthermore, since a plurality of trenches 61 and 62 are provided in the drift layer 30, the dopant concentration of the drift layer 30 can be increased to about 4 × 10¹⁶ cm⁻³.
[0026] The portion of the drift layer 30 divided by trenches 61 and 62 constitutes a mesa region M. When a reverse voltage is applied between the anode electrode 40 and the cathode electrode 50, the mesa region M becomes a depletion layer, thus the channel region of the drift layer 30 is clamped off. In this way, leakage current can be significantly suppressed when a reverse voltage is applied.
[0027] In this embodiment, when the width of the outer peripheral groove 61 along line AA is taken as W1 and the width of the central groove 62 is taken as W2, W1 is set to be greater than W2. Here, the width W1 of the outer peripheral groove 61 refers to the radial width, and the width W2 of the central groove 62 refers to the width in the width direction of the table surface.
[0028] Furthermore, the insulating film 63 covering the inner wall of the outer peripheral groove 61 becomes thicker in the depth direction (i.e., the vertical direction) as it moves radially outward. In other words, the deeper the location, the thicker the insulating film 63 is in the direction perpendicular to the outer peripheral wall of the outer peripheral groove 61 (i.e., the horizontal direction). The increase in thickness is a quadratic function, thereby making the outer peripheral wall S1 of the anode electrode 40 embedded in the outer peripheral groove 61 a gently curved shape that approaches verticality as it moves outward. In contrast, the thickness of the insulating film 63 formed on the inner peripheral wall of the outer peripheral groove 61 is approximately fixed in the horizontal direction, thereby making the inner peripheral wall S2 of the anode electrode 40 closer to vertical than the outer peripheral wall S1 of the anode electrode 40. That is, the outer peripheral wall S1 of the anode electrode 40 has a small angle relative to the upper surface 31 of the drift layer 30 near the boundary with the inner peripheral wall S2, but the angle gradually increases as it moves outward, becoming approximately perpendicular near the upper surface 31 of the drift layer 30. In contrast, the inner peripheral wall S2 of the anode electrode 40 is slightly curved near the boundary with the outer peripheral wall S1, but is approximately perpendicular.
[0029] Thus, in this embodiment, the radial cross-section of the anode electrode 40 embedded in the outer peripheral trench 61 is asymmetrical. One reason for setting the width W1 of the outer peripheral trench 61 to be greater than the width W2 of the central trench 62 is to ensure sufficient radial space for the smooth curvature of the outer peripheral wall S1 of the anode electrode 40. The insulating film 63 having this shape can be formed, for example, by performing film deposition or etching in multiple stages using a plurality of masks.
[0030] Figure 3 is a schematic cross-sectional view showing the structure of the Schottky barrier diode 10 of the comparative example.
[0031] In the Schottky barrier diode 10 shown in Figure 3, the thickness of the insulating film 63 in the direction perpendicular to the wall of the outer peripheral groove 61 is fixed. Therefore, the radial cross-section of the anode electrode 40 embedded in the outer peripheral groove 61 is symmetrical, and both the outer peripheral wall S1 and the inner peripheral wall S2 are approximately vertical. In this configuration, the radius of curvature of the outer peripheral bottom A located between the outer peripheral wall S1 and the bottom surface S3 of the anode electrode 40 becomes smaller, thus the electric field concentrates in this part, which may lead to insulation failure.
[0032] In contrast, in the Schottky barrier diode 11 of this embodiment, the radial cross-section of the anode electrode 40 embedded in the outer peripheral groove 61 is asymmetrical, and the outer peripheral wall S1 of the anode electrode 40 itself forms a gently curved surface with a large radius of curvature, thus the electric field is widely dispersed. In this embodiment, although the radius of curvature of the inner peripheral bottom B located at the boundary between the outer peripheral wall S1 and the inner peripheral wall S2 is relatively small, the electric field is dispersed by the outer peripheral wall S1 itself, which has a large radius of curvature, so there is almost no situation where the electric field is concentrated at the inner peripheral bottom B. Moreover, the inner peripheral wall S2 is approximately perpendicular to the upper surface 31 of the drift layer 30, so the distance between the anode electrode 40 embedded in the outer peripheral groove 61 and the anode electrode 40 embedded in the central groove 62 is not too wide. Therefore, when a reverse voltage is applied, the channel region of the drift layer 30 can be reliably clamped.
[0033] As explained above, in the Schottky barrier diode 11 of this embodiment, by controlling the thickness of the insulating film 63, the outer peripheral wall S1 of the anode electrode 40 itself forms a curved surface with a large radius of curvature. Therefore, even when a reverse voltage is applied, local electric field concentration is not easily generated. This prevents insulation damage at the bottom of the outer peripheral groove 61 when a reverse voltage is applied. Moreover, the outer peripheral groove 61 and the central groove 62 have the same shape except for their widths, so both can be formed simultaneously.
[0034] <Second Embodiment> FIG4 is a schematic cross-sectional view showing the configuration of the Schottky barrier diode 12 according to the second embodiment of the present invention.
[0035] As shown in Figure 4, the difference between the Schottky barrier diode 12 of the second embodiment and the Schottky barrier diode 11 of the first embodiment is that the anode electrode 40 has a generally flat bottom surface S3. The other basic components are the same as those of the Schottky barrier diode 11 of the first embodiment, so the same symbols are used for the same elements, and repeated descriptions are omitted.
[0036] As illustrated in this embodiment, in the present invention, a generally flat bottom surface S3 may also exist between the outer peripheral wall S1 and the inner peripheral wall S2 of the anode electrode 40.
[0037] <Third Embodiment> FIG5 is a schematic cross-sectional view showing the configuration of the Schottky barrier diode 13 according to the third embodiment of the present invention.
[0038] As shown in Figure 5, the difference between the Schottky barrier diode 13 of the third embodiment and the Schottky barrier diode 11 of the first embodiment is that the depth D1 of the peripheral groove 61 is deeper than the depth D2 of the central groove 62. Other basic components are the same as those of the Schottky barrier diode 11 of the first embodiment; therefore, identical elements are marked with the same symbols, and repeated descriptions are omitted.
[0039] As in this embodiment, if the depth D1 of the peripheral trench 61 is deeper than the depth D2 of the central trench 62, the radius of curvature of the peripheral wall S1 of the anode electrode 40 becomes larger, thus further mitigating electric field concentration. However, if the depth D1 of the peripheral trench 61 is too deep, the residual film of the drift layer 30 at the bottom of the peripheral trench 61 will become too thin, which will instead lead to a stronger electric field. Therefore, the depth D1 of the peripheral trench 61 is preferably set such that the thickness of the drift layer 30 at the bottom of the peripheral trench 61 is 1 μm or more.
[0040] <Fourth Embodiment> FIG6 is a schematic cross-sectional view showing the configuration of the Schottky barrier diode 14 according to the fourth embodiment of the present invention.
[0041] As shown in Figure 6, the difference between the Schottky barrier diode 14 of the fourth embodiment and the Schottky barrier diode 11 of the first embodiment is that the upper surface 31 of the drift layer 30 located outside the peripheral groove 61 is covered by an insulating film 63. Other basic components are the same as those of the Schottky barrier diode 11 of the first embodiment; therefore, identical elements are marked with the same symbols, and repeated descriptions are omitted.
[0042] As in this embodiment, if an insulating film 63 is formed not only on the inner wall of the trenches 61 and 62, but also on the upper surface 31 of the drift layer 30 located outside the outer peripheral trench 61, the upper surface 31 of the drift layer 30 can be protected.
[0043] Figure 7 is a schematic cross-sectional view showing the structure of the Schottky barrier diode 14a of the fourth embodiment.
[0044] In the Schottky barrier diode 14a shown in Figure 7, a portion of the anode electrode 40 located above the peripheral groove 61 is removed, and an insulating film 63 is provided on the portion where the anode electrode 40 has been removed. Thus, in this invention, the upper surface of the anode electrode 40 does not need to be flat, and a portion can be removed.
[0045] <Fifth Embodiment> FIG8 is a schematic cross-sectional view showing the configuration of the Schottky barrier diode 15 according to the fifth embodiment of the present invention.
[0046] As shown in Figure 8, the difference between the Schottky barrier diode 15 of the fifth embodiment and the Schottky barrier diode 11 of the first embodiment is that a portion of the anode electrode 40 extends beyond the peripheral groove 61 and is formed on the insulating film 63. Other basic configurations are the same as those of the Schottky barrier diode 11 of the first embodiment; therefore, identical elements are marked with the same symbols, and repeated descriptions are omitted.
[0047] As illustrated in this embodiment, in the present invention, a portion of the anode electrode 40 may also extend beyond the peripheral trench 61 and be formed on the insulating film 63.
[0048] <Sixth Embodiment> FIG9 is a schematic cross-sectional view showing the configuration of the Schottky barrier diode 16 according to the sixth embodiment of the present invention.
[0049] As shown in Figure 9, the difference between the Schottky barrier diode 16 of the sixth embodiment and the Schottky barrier diode 11 of the first embodiment is that a portion of the anode electrode 40 located in the peripheral groove 61 is removed. The other basic components are the same as those of the Schottky barrier diode 11 of the first embodiment; therefore, identical elements are labeled with the same symbols, and repeated descriptions are omitted.
[0050] As illustrated in this embodiment, in this invention, the interior of the peripheral groove 61 does not need to be filled by the anode electrode 40, and a cavity may also exist locally.
[0051] <Seventh Embodiment> FIG10 is a schematic cross-sectional view showing the configuration of the Schottky barrier diode 17 of the seventh embodiment of the present invention.
[0052] As shown in Figure 10, the difference between the Schottky barrier diode 17 of the seventh embodiment and the Schottky barrier diode 16 of the sixth embodiment is that a portion of the insulating film 63 covering the outer peripheral wall of the outer peripheral groove is exposed. The other basic components are the same as those of the Schottky barrier diode 16 of the sixth embodiment; therefore, identical elements are marked with the same symbols, and repeated descriptions are omitted.
[0053] As illustrated in this embodiment, in this invention, it is not necessary to cover the entire outer peripheral wall of the outer peripheral groove 61 with the anode electrode 40, but a portion may be exposed.
[0054] <Eighth Embodiment> Figure 11 is a schematic cross-sectional view showing the configuration of the Schottky barrier diode 18 according to the eighth embodiment of the present invention.
[0055] As shown in Figure 11, the difference between the Schottky barrier diode 18 of the eighth embodiment and the Schottky barrier diode 17 of the seventh embodiment is that the upper part of the outer peripheral wall of the outer peripheral groove 61 is not covered by the insulating film 63 but is exposed. The other basic components are the same as those of the Schottky barrier diode 17 of the seventh embodiment, so the same symbols are marked for the same elements, and repeated descriptions are omitted.
[0056] As illustrated in this embodiment, in this invention, it is not necessary to cover the entire outer peripheral wall of the outer peripheral groove 61 with the insulating film 63, and the upper part can be partially exposed.
[0057] Figure 12 is a schematic cross-sectional view showing the structure of the Schottky barrier diode 18a of the modified example of the eighth embodiment.
[0058] In the Schottky barrier diode 18a shown in Figure 12, an anode electrode 40 is formed on the upper surface of the insulating film 63 located inside the peripheral trench 61. Thus, within the peripheral trench 61, as long as the anode electrode 40 is not in contact with the drift layer 30, there can also be a portion between the two where the insulating film 63 is not present.
[0059] <Ninth Embodiment> FIG13 is a schematic cross-sectional view showing the configuration of the Schottky barrier diode 19 of the ninth embodiment of the present invention.
[0060] As shown in Figure 13, the difference between the Schottky barrier diode 19 of the ninth embodiment and the Schottky barrier diode 11 of the first embodiment is that an insulating film 64, which is different from the insulating film 63, is provided inside the outer peripheral groove 61. The other basic components are the same as those of the Schottky barrier diode 11 of the first embodiment, so the same symbols are used for the same elements, and repeated descriptions are omitted.
[0061] The insulating film 64 contains an insulating material such as SiO2 that is different from the insulating film 63, and its thickness increases in the depth direction (i.e., the vertical direction) as it moves outward radially. In contrast, the thickness of the insulating film 63 is approximately fixed in the direction perpendicular to the inner wall of the outer peripheral groove 61.
[0062] Thus, by covering the inner wall of the outer peripheral groove 61 with an insulating film having a multi-layered structure, the thickness or characteristics of the insulating film can be easily adjusted.
[0063] The preferred embodiments of the present invention have been described above. However, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the spirit of the present invention, and such modifications are also included within the scope of the present invention. [Example]
[0064] <Example 1> Assuming a simulation model of Example 1 with the same structure as the Schottky barrier diode 19 shown in FIG13, the electric field strength is simulated when a reverse voltage of 600 V is applied between the anode electrode 40 and the cathode electrode 50. The dopant concentration of the semiconductor substrate 20 is set to 1×10¹⁸ cm⁻³, and the dopant concentration of the drift layer 30 is set to 4×10¹⁶ cm⁻³. The thickness of the drift layer 30 is set to 7 μm. Furthermore, the depth of the peripheral trench 61 and the central trench 62 is both set to 3 μm. The width W1 of the peripheral trench 61 is set to 10 μm, the width W2 of the central trench 62, and the width of the drift layer 30 in contact with the anode electrode 40, i.e., the width of the mesa region M, are all set to 1.5 μm. The insulating film 63 is a 50 nm thick HfO₂ film. The material of the anode electrode 40 is Cu, and the material of the cathode electrode 50 is a composite film of Ti and Au. Furthermore, the insulating film 64 covering the bottom surface and outer wall of the outer peripheral groove 61 is set as a SiO2 film, and its shape is set as a variable for simulation.
[0065] Figure 14 is a schematic diagram illustrating the parameters of Embodiment 1. As shown in Figure 14, the maximum radial width of the anode electrode 40 embedded in the outer peripheral trench 61 is defined as a, and the maximum depth is defined as b. Furthermore, the film thickness of the insulating film 63 covering the inner peripheral wall of the outer peripheral trench 61 is defined as t1, the minimum film thickness of the insulating films 63 and 64 covering the bottom part of the outer peripheral trench 61 is defined as t2, and the minimum film thickness of the insulating films 63 and 64 covering the outer peripheral wall of the outer peripheral trench 61 is defined as t3.
[0066] In Example 1, the width a and film thickness t3 are used as variables, the depth b is fixed at 2.4 μm, the film thickness t1 is fixed at 0.05 μm, and the film thickness t2 is fixed at 0.6 μm.
[0067] The results are shown in Figure 15. As shown in Figure 15, when the width a of the anode electrode 40 is less than the width W2 of the central trench 62 and the mesa width, i.e., less than 1.5 μm, the maximum electric field strength (Emax) applied to the insulating film 64 exceeds the insulation breakdown electric field strength of silicon oxide, i.e., 10 MV / cm. Conversely, if the width a of the anode electrode 40 exceeds 9.3 μm, the maximum electric field strength applied to the insulating film 64 exceeds the insulation breakdown electric field strength of silicon oxide, i.e., 10 MV / cm. In contrast, the maximum electric field strength applied to the drift layer 30, regardless of the width a of the anode electrode 40, is less than the insulation breakdown electric field strength of gallium oxide, i.e., 8 MV / cm.
[0068] <Comparative Example> Assuming a simulation model of Comparative Example 1 with the same structure as the Schottky barrier diode 10 shown in Figure 3, simulations were performed under the same conditions as in Example 1. The anode electrode 40 embedded in the peripheral trench 61 was symmetrical in shape, with a width a of 9.9 μm, a depth b of 2.95 μm, and film thicknesses t1 to t3 of 0.05 μm. As a result, the maximum electric field strength at the peripheral bottom A shown in Figure 3 was 8.6 MV / cm.
[0069] <Example 2> Width b and film thickness t2 are used as variables, width a is fixed at 4.95 μm, film thickness t1 is fixed at 0.05 μm, film thickness t3 is fixed at 5 μm, and simulation is performed under the same conditions as in Example 1.
[0070] The results are shown in Figure 16. As shown in Figure 16, when the film thickness t2 is less than 1 / 10 of the depth D1 of the outer peripheral trench 61 (less than 0.3 μm), the maximum electric field strength applied to the insulating film 64 exceeds the insulation breakdown electric field strength of silicon oxide, i.e., 10 MV / cm. Conversely, when the depth b of the anode electrode 40 is less than 1.5 μm, the maximum electric field strength applied to the drift layer 30 exceeds the insulation breakdown electric field strength of gallium oxide, i.e., 8 MV / cm.
[0071] <Example 3> The depth D1 of the outer peripheral groove 61 was set to 4 μm, 5 μm or 6 μm, and otherwise the simulation was performed under the same conditions as in Example 2.
[0072] The results are shown in Figure 17. As shown in Figure 17, when the film thickness t2 is less than 1 / 10 of the depth D1 of the peripheral trench 61, the maximum electric field strength applied to the insulating film 64 exceeds the insulation breakdown electric field strength of silicon oxide, i.e., 10 MV / cm. Furthermore, the deeper the depth D1 of the peripheral trench 61, the more effectively the electric field strength applied to the drift layer 30 can be mitigated. [Simplified Explanation of the Diagram]
[0017] FIG1 is a schematic top view showing the configuration of a Schottky barrier diode 11 according to a first embodiment of the present invention. FIG2 is a schematic cross-sectional view along line AA shown in FIG1. FIG3 is a schematic cross-sectional view showing the configuration of a comparative example Schottky barrier diode 10. FIG4 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 12 according to a second embodiment of the present invention. FIG5 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 13 according to a third embodiment of the present invention. FIG6 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 14 according to a fourth embodiment of the present invention. FIG7 is a schematic cross-sectional view showing the configuration of a modified example of the fourth embodiment of the Schottky barrier diode 14a. FIG8 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 15 according to a fifth embodiment of the present invention. Figure 9 is a schematic cross-sectional view showing the structure of the Schottky barrier diode 16 according to the sixth embodiment of the present invention. Figure 10 is a schematic cross-sectional view showing the structure of the Schottky barrier diode 17 according to the seventh embodiment of the present invention. Figure 11 is a schematic cross-sectional view showing the structure of the Schottky barrier diode 18 according to the eighth embodiment of the present invention. Figure 12 is a schematic cross-sectional view showing the structure of the Schottky barrier diode 18a, a modified example of the eighth embodiment. Figure 13 is a schematic cross-sectional view showing the structure of the Schottky barrier diode 19 according to the ninth embodiment of the present invention. Figure 14 is a schematic diagram illustrating the parameters of Example 1. Figure 15 is a graph showing the simulation results of Example 1. Figure 16 is a graph showing the simulation results of Example 2. Figure 17 is a table showing the simulation results of Example 3.
Claims
1. A Schottky barrier diode, characterized in that it comprises: a semiconductor substrate containing gallium oxide; a drift layer containing gallium oxide disposed on the semiconductor substrate; an anode electrode having a Schottky contact with the drift layer; a cathode electrode having an ohmic contact with the semiconductor substrate; and an insulating film covering the inner wall of a trench disposed in the drift layer; the trench comprising an annular peripheral trench and a central trench formed in a region surrounded by the peripheral trench, a portion of the anode electrode being embedded in the peripheral trench and the central trench through the insulating film, the insulating film being thicker in the depth direction of the peripheral trench as it faces outward, thereby the outer peripheral wall of the anode electrode embedded in the peripheral trench having a curved shape that is nearly vertical as it faces outward.
2. As in request 1, the Schottky barrier diode, wherein, The inner peripheral wall of the anode electrode embedded in the outer peripheral trench is closer to vertical than the outer peripheral wall.
3. As in request 1, a Schottky barrier diode, wherein, The width of the outer peripheral groove is wider than the width of the central groove.
4. As in Request 1, the Schottky barrier diode, wherein, The aforementioned peripheral grooves are deeper than the aforementioned central grooves.
5. As in Request 1, the Schottky barrier diode, wherein, The surface above the drift layer located outside the aforementioned peripheral groove is covered by the aforementioned insulating film.
6. A Schottky barrier diode as described in any of requests 1 to 5, wherein, The insulating film described above has at least a multi-layered structure covering the inner wall of the outer peripheral groove.