Circuit board and method of manufacturing the same

Abstract

A circuit board comprises a conductive metal layer, at least one insulating layer, at least one thermally conductive insulating layer and a heat dissipation element . The conductive metal layer is mainly used to transmit electronic signals. The insulating layer is connected to the conductive metal layer. The thermally conductive insulating layer is sandwiched between the conductive metal layer and the insulating layer, and thermally contacts the conductive metal layer, and is used for thermally conducting the heat of the conductive metal layer. The heat dissipation element is in thermal contact with the thermally conductive insulating layer, and is used to transfer the heat from the thermally conductive insulating layer to the outside through a heat dissipation channel.

Description

[Technical Field]

[0001] This invention relates to a circuit board and a method for manufacturing the same, and more particularly to a circuit board including a thermally conductive insulating layer and a method for manufacturing the same. [Previous Technology]

[0002] Currently, electronic devices, such as smartphones and computers, have circuit boards and many electronic components mounted on the circuit boards, such as integrated circuits (ICs). When the electronic device is operating, these electronic components generate a lot of heat, causing the circuits to accumulate heat and resulting in overheating of the electronic device, thereby reducing the performance of the electronic device. [Summary of the Invention]

[0003] At least one embodiment of the present invention provides a circuit board that uses a thermally conductive insulating layer to solve the problem caused by the heat storage of the circuit.

[0004] At least one embodiment of the present invention also provides a method for manufacturing a circuit board to manufacture the circuit board including the above-mentioned thermally conductive insulating layer.

[0005] The circuit board provided in at least one embodiment of the present invention includes a conductive metal layer, at least one insulating layer, at least one thermally conductive insulating layer, and a heat sink. The conductive metal layer is mainly used to transmit electronic signals. The insulating layer connects to the conductive metal layer. The thermally conductive insulating layer is sandwiched between the conductive metal layer and the insulating layer, and is in thermal contact with the conductive metal layer, and is used to conduct heat from the conductive metal layer. The heat sink is in thermal contact with the thermally conductive insulating layer, and is used to conduct heat from the thermally conductive insulating layer to the outside through heat dissipation channels.

[0006] In at least one embodiment of the present invention, the insulating layer is a dielectric layer, an insulating pattern layer, or an insulating protective layer.

[0007] In at least one embodiment of the present invention, the above-mentioned thermally conductive insulating layer is a nitride layer or a carbide layer.

[0008] In at least one embodiment of the present invention, the material of the above-mentioned thermally conductive insulating layer is aluminum nitride, silicon carbide or boron nitride.

[0009] In at least one embodiment of the present invention, the above-mentioned thermally conductive insulating layer is in thermal contact with at least a portion of the side surface of the conductive metal layer.

[0010] In at least one embodiment of the present invention, the material of the insulating layer is a photosensitive dielectric material.

[0011] In at least one embodiment of the present invention, the circuit board has a core layer, and a conductive metal layer is formed on one side of the core layer to form a thermally conductive insulating layer.

[0012] In at least one embodiment of the present invention, the heat sink is a second heat dissipation insulating layer.

[0013] In at least one embodiment of the present invention, the heat dissipation channel is a third heat dissipation insulating layer.

[0014] A method for manufacturing a circuit board according to at least one embodiment of the present invention includes forming a substrate having a bearing plane. Next, a thermally conductive insulating layer is formed on the bearing plane. Next, a conductive metal layer is formed on the bearing plane, wherein the conductive metal layer is in thermal contact with the thermally conductive insulating layer.

[0015] In at least one embodiment of the present invention, the method of forming a substrate described above includes providing an initial substrate. Then, an insulating material is formed on the initial substrate. Then, a metal foil is laminated onto the insulating material, wherein the metal foil has a bright side, and the bright side of the metal foil is in direct contact with the insulating material. After laminating the metal foil, the insulating material is cured to form an insulating layer. Then, the metal foil is removed to expose the insulating layer.

[0016] In at least one embodiment of the present invention, the above-mentioned method for removing the metal foil is etching.

[0017] In at least one embodiment of the present invention, the method for manufacturing the circuit board further includes cutting a substrate to form a plurality of unit substrates, wherein each unit substrate has a side. Then, a heat sink is formed on the side of one of the unit substrates, wherein the heat sink is in thermal contact with a thermally conductive insulating layer.

[0018] In at least one embodiment of the present invention, the above-mentioned thermally conductive insulating layer is located between the conductive metal layer and the substrate.

[0019] In at least one embodiment of the present invention, the conductive metal layer is located between the thermally conductive insulating layer and the substrate.

[0020] Based on the above, by utilizing the above thermally conductive insulating layer, the problem of heat storage in existing circuits can be solved, so that the heat energy of electronic components can be quickly discharged without accumulation, thereby effectively improving the performance of electronic components and preventing the circuit board of the present invention from having the problem of heat storage in the circuit.

Implementation Method

[0022] In the following text, in order to clearly present the technical features of this application, the dimensions (e.g., length, width, thickness, and depth) of the elements (e.g., layers, films, substrates, and regions) in the drawings will be enlarged proportionally, and the number of some elements will be reduced. Therefore, the description and explanation of the embodiments below are not limited to the number of elements in the drawings and the size and shape of the elements, but should cover the size, shape, and deviations of both caused by actual manufacturing processes and / or tolerances. For example, a flat surface shown in the drawings may have rough and / or non-linear characteristics, and an acute angle shown in the drawings may be rounded. Therefore, the elements presented in the drawings of this application are mainly for illustration and are not intended to accurately depict the actual shape of the elements, nor are they intended to limit the scope of this application.

[0023] Secondly, the terms "approximately," "approximately," or "substantially" used in this document not only cover explicitly stated numerical values ​​and ranges, but also the permissible deviation range understandable to someone with ordinary skill in the art. This deviation range can be determined by errors generated during measurement, which may be caused by limitations of the measurement system or process conditions. Furthermore, "approximately" can mean within one or more standard deviations of the aforementioned numerical values, such as ±30%, ±20%, ±10%, or ±5%. The terms "approximately," "approximately," or "substantially" used in this document can be chosen based on optical properties, etching properties, mechanical properties, or other properties to select an acceptable deviation range or standard deviation, and are not applied to all optical properties, etching properties, mechanical properties, and other properties using only one standard deviation.

[0024] FIG1 is a schematic cross-sectional view of a circuit board assembly including a circuit board according to at least one embodiment of the present invention. Referring to FIG1, the circuit board assembly 10 includes the circuit board 100 of this embodiment and electronic components 210, wherein the electronic components 210 are mounted on the circuit board 100. The electronic components 210 may be packaged chips or unpackaged dies, therefore the circuit board assembly 10 may be a chip package or a printed circuit board assembly (PCBA).

[0025] The circuit board 100 includes a unit substrate 110 and an insulating layer 130, wherein the unit substrate 110 includes an insulating layer 111a, and the insulating layer 111a has a bearing plane P11a, and may be a dielectric layer, an insulating pattern layer, or an insulating protective layer. The insulating layer 130 is disposed on the bearing plane P11a and has a plurality of trenches 131, wherein each trench 131 extends to the bearing plane P11a. That is, each trench 131 is formed through the insulating layer 130. In addition, the roughness of the bearing plane P11a is quite low. For example, the root mean square roughness (Rq) of the bearing plane P11a is less than or equal to 0.1 micrometers, so the bearing plane P11a is essentially a smooth surface.

[0026] The circuit board 100 also includes at least one thermally conductive insulating layer 170, wherein the thermally conductive insulating layer 170 is disposed on the bearing plane P11a and covers the insulating layer 130. The thermally conductive insulating layer 170 extends from the trenches 131 to the bearing plane P11a and completely covers the trench walls 131s and bottom 131b of each trench 131. Taking FIG. 1 as an example, the thermally conductive insulating layer 170 can completely cover all surfaces of each trench 131. In addition, since each trench 131 extends to the bearing plane P11a, the thermally conductive insulating layer 170 can cover and directly contact a portion of the bearing plane P11a, as shown in FIG. 1.

[0027] Since the roughness of the bearing plane P11a is quite low (root mean square roughness less than or equal to 0.1 micrometers), the thermally conductive insulating layer 170 is basically formed on the smooth bearing plane P11a so that the thermally conductive insulating layer 170 can also have a low roughness upper surface 171, especially the part of the upper surface 171 that directly contacts the bearing plane P11a is also basically a smooth surface.

[0028] The thermally conductive insulating layer 170 can be made of inorganic materials. In this embodiment, the thermally conductive insulating layer 170 can be a nitride layer or a carbide layer. For example, the material of the thermally conductive insulating layer 170 can be aluminum nitride, silicon carbide, or boron nitride. The thermally conductive insulating layer 170 can be formed by physical vapor deposition (PVD), wherein the aforementioned physical vapor deposition can be sputtering or evaporation. Furthermore, the thickness 170t of the thermally conductive insulating layer 170 can be between 0.2 and 0.4 micrometers, and the thermal conductivity of the thermally conductive insulating layer 170 can be between 300 W / mK (i.e., W·m⁻¹·K⁻¹) and 450 W / mK, thus the thermally conductive insulating layer 170 has good thermal conductivity.

[0029] The circuit board 100 also includes a conductive metal layer 120, which is disposed on the thermally conductive insulating layer 170 and filled in the trenches 131, and the insulating layer 130 and 111a connect the conductive metal layer 120. Specifically, the conductive metal layer 120 is mainly used to transmit electronic signals and may include multiple traces 121 and multiple pads 122, wherein the traces 121 and the pads 122 are respectively disposed in the trenches 131. The height L12 of each trace 121 and each pad 122 relative to the bearing plane P11a may be substantially equal and greater than the height L17 of the thermally conductive insulating layer 170 relative to the bearing plane P11a. Therefore, the height of the conductive metal layer 120 relative to the bearing plane P11a (e.g., height L12) is greater than the height L17 of the thermally conductive insulating layer 170 relative to the bearing plane P11a. In other words, each trace 121 and each pad 122 protrudes completely from the upper surface 171 of the thermally conductive insulating layer 170. Furthermore, the thermally conductive insulating layer 170 is sandwiched between the conductive metal layer 120 and the insulating layer 130, and is in thermal contact with the conductive metal layer 120 to conduct heat from the conductive metal layer 120. The thermally conductive insulating layer 170 may be in thermal contact with at least a portion of the side surface of the conductive metal layer 120, as shown in Figure 1.

[0030] These pads 122 can be used to mount electronic components 210. For example, in this embodiment, electronic components 210 can be mounted on these pads 122 using solder balls S11 and a flip-chip method. Alternatively, in other embodiments, electronic components 210 can be mounted on these pads 122 using a wire-bonding method. Therefore, the electronic components 210 in FIG1 are not limited to being mounted on these pads 122 using a flip-chip method.

[0031] Since the thermally conductive insulating layer 170 has a low-roughness upper surface 171, the conductive metal layer 120 filled in these trenches 131 also has a low-roughness surface. In particular, the conductive metal layer 120 located at the bottom 131b of the trench 131 has a bottom surface with a very low roughness, so as to reduce signal loss caused by the skin effect and thereby improve the signal transmission quality of the circuit board 100.

[0032] Secondly, since the height L12 of each trace 121 and each pad 122 relative to the bearing plane P11a is greater than the height L17 of the thermally conductive insulating layer 170 relative to the bearing plane P11a, the sides and bottom surfaces of each trace 121 and each pad 122 are partially covered by the thermally conductive insulating layer 170 and the insulating layer 130, so that the insulating layer 130 can cover the bottom of both the trace 121 and the pad 122. In this way, at least a portion of the conductive metal layer 120 can be embedded in the insulating layer 130 to strengthen the bonding force between the conductive metal layer 120 and the insulating layer 130, reducing or avoiding the risk of trace stripping.

[0033] The thermal conductivity of the thermally conductive insulating layer 170 can be between 300 W / mK and 450 W / mK, thus exhibiting good thermal conductivity. Therefore, when the circuit board assembly 10 is powered on and operating, the thermally conductive insulating layer 170 can quickly transfer the heat generated by the electronic component 210 and the conductive metal layer 120, preventing heat accumulation in the circuit board assembly 10. In this way, the thermally conductive insulating layer 170 can help suppress the temperature rise of the electronic component 210, preventing overheating and thereby improving the performance and lifespan of the electronic component 210.

[0034] The circuit board 100 may further include a heat sink 150, wherein the heat sink 150 is disposed on the side 100s of the circuit board 100 and surrounds the unit substrate 110, the insulating layer 130, the thermally conductive insulating layer 170, and the conductive metal layer 120. The material and forming method of the heat sink 150 may be the same as those of the thermally conductive insulating layer 170. For example, the heat sink 150 may be a nitride layer or a carbide layer and may be formed by sputtering or vapor deposition.

[0035] The heat sink 150 is in thermal contact with the thermally conductive insulating layer 170, and is used to conduct the heat of the thermally conductive insulating layer 170 to the outside through the heat dissipation channel 151, so that the thermally conductive insulating layer 170 can also quickly transfer heat energy to the heat sink 150. In this way, the heat sink 150 located on the side 100s can dissipate heat energy to the external environment, avoid heat energy accumulation in the circuit board assembly 10, thereby solving the problem caused by the current circuit heat storage, and effectively suppressing the temperature rise of the electronic component 210. In addition, the heat dissipation channel 151 can be a third heat dissipation insulating layer, and the heat sink 150 can be a second heat dissipation insulating layer.

[0036] It is worth mentioning that in other embodiments, the circuit board 100 may not include the heat sink 150, and the side 100s of the circuit board 100 may expose a portion of the thermally conductive insulating layer 170. Specifically, the thermally conductive insulating layer 170 may extend to at least one side 100s of the circuit board 100. For example, the circuit board 100 may have four sides 100s, and the thermally conductive insulating layer 170 may extend to one or all of the sides 100s of the circuit board 100. In this way, the heat generated by the electronic component 210 and the conductive metal layer 120 can be transferred to the side 100s to suppress the temperature rise of the electronic component 210.

[0037] In addition, in the embodiment shown in FIG1, the unit substrate 110 may be a circuit substrate. Specifically, the unit substrate 110 may further include a core layer 113 and two conductive metal layers 112a and 112b, wherein the two conductive metal layers 112a and 112b are respectively disposed on opposite sides of the core layer 113, so the core layer 113 is located between the conductive metal layers 112a and 112b.

[0038] The unit substrate 110 may further include at least one conductive post 114. Taking FIG. 1 as an example, the unit substrate 110 includes a plurality of conductive posts 114, wherein these conductive posts 114 are all located in the core layer 113 and connect to conductive metal layers 112a and 112b, so that these conductive metal layers 112a and 112b can be electrically connected through the conductive posts 114. In addition, these conductive posts 114 can be formed by laser drilling and electroplating, wherein a single conductive post 114 can be formed by connecting two conductive blind via structures. Therefore, the shape of each conductive post 114 can be similar to an hourglass shape. That is, each conductive post 114 has a non-uniform diameter, wherein the two ends of the conductive post 114 have the largest diameter, and the central part of the conductive post 114 has the smallest radius.

[0039] The circuit board 100 may further include an insulating layer 111b. Insulating layers 111a and 111b are respectively disposed on opposite sides of the core layer 113, such that the core layer 113 is located between the insulating layers 111a and 111b, wherein the insulating layers 111a and 111b respectively cover the conductive metal layers 112a and 112b. In addition, the circuit board 100 may further include a conductive metal layer 140, wherein the conductive metal layer 140 is disposed and adjacent to the insulating layer 111b, and the insulating layers 111a and 111b are both located between the conductive metal layers 120 and 140. Furthermore, the conductive metal layer 140 may form a thermally conductive insulating layer 170 on one side facing the core layer 120.

[0040] The circuit board 100 may further include a plurality of conductive blind via structures 160, wherein these conductive blind via structures 160 are located in insulating layers 111a, 111b and insulating layer 130. At least one conductive blind via structure 160 penetrates insulating layers 111a and 130 to connect conductive metal layers 120 and 112a, such that conductive metal layer 120 can be electrically connected to conductive metal layer 112a through conductive blind via structure 160. At least one other conductive blind via structure 160 penetrates insulating layer 111b to connect conductive metal layers 140 and 112b, such that conductive metal layer 140 can be electrically connected to conductive metal layer 112b through conductive blind via structure 160. Thus, using these conductive blind via structures 160 and conductive posts 114, signals (e.g., current signals) can be transmitted between conductive metal layers 120, 112a, 112b and 140.

[0041] The circuit board 100 may further include two insulating protective layers 190, wherein these two insulating protective layers 190 partially cover the conductive metal layers 120 and 140, respectively. Specifically, these insulating protective layers 190 do not completely cover or do not cover the pads 122 of the conductive metal layer 120 and the pads 142 of the conductive metal layer 140, so that these pads 122 can be electrically connected to the electronic component 210, and these pads 142 can be electrically connected to an external circuit board (not shown) through solder balls S11. In this way, the electronic component 210 can be mounted on the circuit board 100, and the circuit board assembly 10 can be mounted on an external circuit board.

[0042] The circuit board assembly 10 may further include a molding compound 231 and a filler material 232, wherein the molding compound 231 is disposed on the conductive metal layer 120 and surrounds the electronic component 210, and the molding compound 231 may be a resin material, such as epoxy resin. The filler material 232 is disposed in the gap (not shown) between the electronic component 210 and the adjacent insulating protective layer 190, and fills the gap.

[0043] The circuit board assembly 10 may also include a heat sink 221, such as a heat dissipation element, wherein the heat sink 221 can have thermal contact with the electronic component 210. In this way, the heat generated by the electronic component 210 can be transferred not only to the thermally conductive insulating layer 170 and the heat sink 150 through the solder balls S11 and the conductive metal layer 120, but also to the heat sink 221, so that the heat can be dissipated from the thermally conductive insulating layer 170, the heat sink 150 and the heat sink 221 to the external environment, thereby effectively suppressing the temperature rise of the electronic component 210, thereby improving the performance and lifespan of the electronic component 210.

[0044] The circuit board assembly 10 may further include a thermally conductive material 222, such as a thermal adhesive or a thermal pad, wherein the thermally conductive material 222 may be sandwiched between the electronic component 210 and the heat sink 221, and directly contact the electronic component 210 and the heat sink 221. In this way, the heat generated by the electronic component 210 and the conductive metal layer 120 can be quickly transferred to the heat sink 221 and dissipated from the heat sink 221 to the external environment, thereby preventing heat accumulation in the circuit and suppressing the temperature rise of the electronic component 210.

[0045] The thermally conductive material 222 can directly contact the back surface 211 of the electronic component 210, where the back surface 211 is not provided with any pads. Therefore, current signals cannot be input to the electronic component 210 from the back surface 211. Thus, the thermally conductive material 222 will not directly affect the current transmission inside the electronic component 210. In addition, the thermally conductive material 222 can also be an electrical insulator, so not only will the electronic component 210 not be electrically connected to the thermally conductive material 222, but the electronic component 210 can also be electrically insulated from the thermally conductive material 222.

[0046] Figures 2A to 2I are cross-sectional schematic diagrams of the manufacturing method of the circuit board in Figure 1. Referring to Figure 2A, in the manufacturing method of the circuit board 100, firstly, an initial substrate 110i can be provided, wherein the initial substrate 110i will be cut into multiple unit substrates 110 in subsequent processes, so the structure of the initial substrate 110i will be substantially the same as the structure of the unit substrates 110.

[0047] The initial substrate 110i may be a circuit substrate and has a conductive metal layer. Taking FIG2A as an example, the initial substrate 110i includes a core layer 113 and two conductive metal layers 112a and 112b, which are respectively disposed on opposite sides of the core layer 113. The initial substrate 110i may also include a plurality of conductive pillars 114 located in the core layer 113, wherein each conductive pillar 114 connects to the conductive metal layers 112a and 112b, and these conductive pillars 114 may be formed by drilling and electroplating, wherein the drilling may be laser drilling or mechanical drilling.

[0048] Referring to FIG. 2B, two insulating materials 111 are then formed on the initial substrate 110i, wherein these insulating materials 111 are respectively disposed on opposite sides of the initial substrate 110i and respectively cover conductive metal layers 112a and 112b. Therefore, the initial substrate 110i can be sandwiched between these insulating materials 111. In addition, the insulating material 111 may include a polymer material, such as resin, and the insulating material 111 may be a prepreg.

[0049] Subsequently, two metal foils 20, such as copper foils, are pressed onto these insulating materials 111. The insulating materials 111 may be adhesive, so that after the metal foils 20 are pressed onto the insulating materials 111, the insulating materials 111 can respectively adhere the metal foils 20. Each metal foil 20 has a bright surface 21g and a rough surface 21m, wherein the roughness of the bright surface 21g is less than the roughness of the rough surface 21m, and the bright surface 21g and the rough surface 21m of the same metal foil 20 are opposite to each other.

[0050] During the pressing of these metal foils 20, the bright side 21g of one metal foil 20 faces the insulating material 111, so that after pressing this metal foil 20, the bright side 21g of the metal foil 20 can directly contact the insulating material 111, as shown in the upper metal foil 20 in Figure 2B. The rough side 21m of the other metal foil 20 faces another insulating material 111, so that the rough side 21m of this metal foil 20 can directly contact the insulating material 111, as shown in the lower metal foil 20 in Figure 2B.

[0051] Referring to FIG. 2C, after the metal foils 20 are pressed together, the insulating materials 111 are cured to form the insulating layers 111a and 111b. The metal foils 20 are then removed to expose the insulating layers 111a and 111b, wherein the metal foils 20 can be removed by etching. Since the bright surface 21g of the upper metal foil 20 in FIG. 2B is in direct contact with the insulating material 111, the insulating material 111 that has been in contact with the bright surface 21g forms an insulating layer 111a with a low-roughness bearing plane P11a. The insulating material 111 that has been in contact with the rough surface 21m forms an insulating layer 111b with a rough surface P11b. After the metal foils 20 are removed, a substrate 110p is formed, including the insulating layers 111a and 111b and the initial substrate 110i.

[0052] It should be noted that in this embodiment, the substrate 110p includes insulating layers 111a and 111b. However, in other embodiments, the substrate 110p may only include an initial substrate 110i and a single insulating layer disposed on the initial substrate 110i. For example, the insulating layer 111b in FIG. 2C may be omitted. Secondly, the initial substrate 110i in this embodiment is a circuit substrate, but in other embodiments, the initial substrate 110i may also be a substrate without any conductive metal layer. Taking FIG. 2C as an example, the conductive metal layers 112a, 112b and the conductive pillars 114 in the initial substrate 110i may be omitted. Therefore, FIG. 2A to FIG. 2C do not limit the substrate 110p and its formation method.

[0053] Referring to FIG. 2D, an insulating layer 130 is then formed on the carrier plane P11a. The material of the insulating layer 130 is a photosensitive dielectric material, and the method for forming the insulating layer 130 on the carrier plane P11a includes exposure and development. Specifically, in the step of forming the insulating layer 130, a photosensitive dielectric layer may first be formed on the carrier plane P11a. Then, this photosensitive dielectric layer is exposed. Next, the photosensitive dielectric layer is developed to form an insulating layer 130 having a plurality of trenches 131, wherein these trenches 131 are formed by exposure and development.

[0054] Referring to FIG. 2E, a thermally conductive insulating layer 170 is then formed on the insulating layer 130 and the bearing plane P11a. The thermally conductive insulating layer 170 can be formed using physical vapor deposition (PVD), such as sputtering or evaporation. The thermally conductive insulating layer 170 covers the insulating layer 130 and extends from these trenches 131 to the bearing plane P11a. The thermally conductive insulating layer 170 completely covers the trench walls 131s and bottom 131b of each trench 131, and the thermally conductive insulating layer 170 can directly contact the insulating layer 130 and the bearing plane P11a.

[0055] Referring to FIG. 2F, a metal seed layer 220a is then formed on the thermally conductive insulating layer 170. The metal seed layer 220a completely covers the thermally conductive insulating layer 170, and more completely covers the portion of the thermally conductive insulating layer 170 located within these trenches 131. Furthermore, during the formation of the metal seed layer 220a, another metal seed layer 220b may be formed on the insulating layer 111b, wherein both the insulating layers 111a and 111b are located between the metal seed layers 220a and 220b.

[0056] Referring to FIG. 2G, two masking layers 30 are then formed on the metal seed layers 220a and 220b, respectively. These masking layers 30 partially cover the metal seed layers 220a and 220b, with one masking layer 30 (e.g., the upper masking layer 30 in FIG. 2G) exposing a portion of the metal seed layer 220a located within these trenches 131. In this embodiment, the aforementioned masking layer 30 may expose a portion of the metal seed layer 220a overlapping with the conductive blind via structure 160. The other masking layer 30 (e.g., the lower masking layer 30 in FIG. 2G) has multiple openings (not shown), and these openings expose a portion of the metal seed layer 220b.

[0057] Referring to Figures 2G and 2H, the metal seed layers 220a and 220b are then electroplated to form a conductive metal layer 120 on the upper surface 171 of the thermally conductive insulating layer 170 and on the bearing plane P11a, and a conductive metal layer 140 on the lower surface of the insulating layer 111b, wherein the thermally conductive insulating layer 170 is located between the conductive metal layer 120 and the substrate 110p. Then, the masking layers 30 and the portions of the metal seed layers 220a and 220b covered by the masking layers 30 are removed to separate the traces 121 and pads 122 of the conductive metal layer 120 from each other, and to separate the pads 142 of the conductive metal layer 140 from each other, thereby preventing short circuits.

[0058] Referring to Figure 2I, after forming these conductive metal layers 120 and 140, these insulating protective layers 190 can be formed on these conductive metal layers 120 and 140 respectively, wherein the insulating protective layer 190 can be a solder mask layer. These insulating protective layers 190 can be solder mask defined (SMD) or non-solder mask defined (NSMD).

[0059] Taking Figures 1 and 2I as examples, each insulating protective layer 190 is defined as a solder resist layer. Therefore, these insulating protective layers 190 will cover a portion of each pad 122 and a portion of each pad 142, but will not completely cover the pads 122 and 142, so that the pads 122 and 142 can be electrically connected to the electronic component 210 and the external circuit board, respectively. In other embodiments, each insulating protective layer 190 may also be non-solder resist layer defined, so each insulating protective layer 190 may not cover any pads 122 and 142 at all, that is, the insulating protective layer 190 may not contact any pads 122 and 142.

[0060] Subsequently, substrate 110p can be cut to form multiple unit substrates 110. At this point, the circuit board 100 is basically manufactured, wherein the side edges 100s of the circuit board 100 are formed by cutting the substrate 110p. During the cutting of substrate 110p, the thermally conductive insulating layer 170, insulating layer 130, conductive metal layers 120, 140 and insulating protective layer 190 in the circuit board 100 are also cut so that the side edges 100s of the circuit board 100 can expose part of the thermally conductive insulating layer 170, wherein the surface of the thermally conductive insulating layer 170 exposed on the side edge 100s (not shown) can be flush with the side edge of the unit substrate 110.

[0061] Each unit substrate 110 has a side edge (not shown) formed by cutting, wherein the side edge 100s of the same circuit board 100 includes the side edge of the unit substrate 110. In other words, the side edge of the unit substrate 110 is part of the side edge 100s. Furthermore, after cutting the substrate 110p, a heat sink 150 can be formed on the side edge 100s (including the side edge of the unit substrate 110), wherein the heat sink 150 is in thermal contact with the thermally conductive insulating layer 170.

[0062] Since the heat sink 150 and the thermally conductive insulating layer 170 can be made of the same material and formed by the same method, the heat sink 150 can be formed by physical vapor deposition (PVD), such as sputtering or evaporation, and the heat sink 150 can be a nitride layer or a carbide layer. For example, the material of the heat sink 150 can be aluminum nitride, silicon carbide or boron nitride.

[0063] It is worth mentioning that the circuit board 100 disclosed in the above embodiments has four conductive metal layers, namely conductive metal layers 112a, 112b, 120 and 140. However, since the initial substrate 110i (see FIG. 2A) may not have any conductive metal layers, the number of conductive metal layers in the circuit board 100 may be only two, that is, conductive metal layers 112a and 112b may be omitted.

[0064] Furthermore, in FIG2C, the substrate 110p may only include the initial substrate 110i and the insulating layer 111a disposed on the initial substrate 110i, while the insulating layer 111b may be omitted. Secondly, the conductive metal layer 140 may also be omitted, and under the condition that the initial substrate 110i does not have any conductive metal layer, the circuit board 100 may have only one conductive metal layer, namely conductive metal layer 120. In other words, the circuit board 100 may be a single-layer circuit board, and FIG1 and FIG2I do not limit the number of conductive metal layers of the circuit board 100.

[0065] Figures 3A to 3E are schematic cross-sectional views of a method for manufacturing a circuit board according to at least one embodiment of the present invention, wherein the circuit board 300 shown in Figure 3E is similar to the circuit board 100 in the aforementioned embodiments. Therefore, the following text and Figures 3A to 3E only disclose the differences between circuit boards 300 and 100, and the same features will not be described again.

[0066] Referring to FIG. 3A, after two insulating materials 111 are formed on the initial substrate 110i (refer to FIG. 2B), two metal foils 20, such as copper foils, can be laminated onto these insulating materials 111 respectively. The bright side 21g of one of the metal foils 20 directly contacts the insulating material 111, as shown by the upper metal foil 20 in FIG. 3A. Next, these insulating materials 111 are cured to form insulating layers 111a and 111b. Since the bright side 21g of the metal foil 20 directly contacts the upper insulating material 111, the insulating layer 111a has a low-roughness bearing plane P11a. Next, a plurality of through holes 111h are formed on these metal foils 20, wherein these through holes 111h penetrate the metal foils 20 and the insulating layers 111a and 111b, but do not penetrate the conductive metal layers 112a and 112b. Furthermore, the through holes 111h can be formed using laser drilling.

[0067] Referring to FIG3B, the metal foils 20 are then removed to form a substrate 310p. The metal foils 20 can be removed by etching. The substrate 310p includes a core layer 113, insulating layers 111a and 111b, and conductive metal layers 112a and 112b. Next, two metal seed layers 320 are formed on opposite sides of the substrate 310p, respectively. These two metal seed layers 320 completely cover the insulating layers 111a and 111b, as well as the walls and bottom of the through holes 111h.

[0068] Referring to FIG. 3C, next, the same steps as disclosed in FIGS. 2F to 2H are performed, using a masking layer 30 (not shown in FIG. 3C) to electroplate the metal seed layer 320 to form at least two conductive metal layers 340, wherein the conductive metal layers 340 fill the through-hole 111h. Next, the masking layer 30 and the portion of the metal seed layer 320 covered by the masking layer 30 are removed to prevent short circuits in the conductive metal layers 340. Referring to FIG. 3D, next, a thermally conductive insulating layer 370 is formed on the bearing plane P11a of the insulating layer 111a, wherein the thermally conductive insulating layer 370 completely covers the upper conductive metal layer 340, and this conductive metal layer 340 is located between the thermally conductive insulating layer 370 and the substrate 310p. Furthermore, the formation method and material of the thermally conductive insulating layer 370 are the same as those of the thermally conductive insulating layer 170, and therefore will not be described again.

[0069] Referring to Figure 3E, insulating protective layers 190 are then formed on the two conductive metal layers 340, wherein the insulating protective layers 190 may partially cover the conductive metal layers 340, but not completely cover them. Next, cutting can be performed. At this point, the circuit board 300 is essentially complete. After cutting, a heat sink 350 can be formed on the side of the circuit board 300, wherein the heat sink 350 may be a heat-dissipating insulating layer, and the heat sink 350 is in thermal contact with the thermally conductive insulating layer 370. The formation method and material of the heat sink 350 are the same as those of the heat sink 150, and therefore will not be described again.

[0070] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Those skilled in the art to which the present invention pertains may make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims. [Simplified Explanation of the Diagram]

[0021] FIG1 is a schematic cross-sectional view of a circuit board assembly including a circuit board according to at least one embodiment of the present invention. FIG2A to FIG2I are schematic cross-sectional views of a method for manufacturing the circuit board in FIG1. ​​FIG3A to FIG3E are schematic cross-sectional views of a method for manufacturing the circuit board according to at least one embodiment of the present invention.

Claims

1. A circuit board, comprising: A conductive metal layer, primarily used to transmit an electronic signal; At least one insulating layer is connected to the conductive metal layer; at least one thermally conductive insulating layer is sandwiched between the conductive metal layer and the insulating layer and is in thermal contact with the conductive metal layer for conducting heat from the conductive metal layer; a heat sink is in thermal contact with the thermally conductive insulating layer for conducting heat from the thermally conductive insulating layer to the outside through a heat dissipation channel.

2. The circuit board as claimed in claim 1, wherein the insulating layer is a dielectric layer, an insulating pattern layer, or an insulating protective layer.

3. The circuit board as claimed in claim 1, wherein the thermally conductive insulating layer is a nitride layer or a carbide layer.

4. The circuit board as claimed in claim 1, wherein the thermally conductive insulating layer is made of aluminum nitride, silicon carbide, or boron nitride.

5. The circuit board as claimed in claim 1, wherein the thermally conductive insulating layer is in thermal contact with at least a portion of the side surface of the conductive metal layer.

6. The circuit board as claimed in claim 1, wherein the insulating layer is made of a photosensitive dielectric material.

7. The circuit board as claimed in claim 1, wherein the circuit board has a core layer and the conductive metal layer forms the thermally conductive insulating layer on one side facing the core layer.

8. The circuit board as claimed in claim 1, wherein the heat sink is a second heat-dissipating insulating layer.

9. The circuit board as claimed in claim 1, wherein the heat dissipation channel is a third heat dissipation insulation layer.

10. A method for manufacturing a circuit board, comprising: A substrate is formed having a bearing plane; a thermally conductive insulating layer is formed on the bearing plane; A conductive metal layer is formed on the bearing plane, wherein the conductive metal layer is in thermal contact with the thermally conductive insulating layer.

11. A method for manufacturing a circuit board as claimed in claim 10, wherein the method of forming the substrate comprises: Provide an initial substrate; An insulating material is formed on the initial substrate; A metal foil is laminated onto the insulating material, wherein the metal foil has a bright surface and the bright surface of the metal foil is in direct contact with the insulating material; after the metal foil is laminated, the insulating material is cured to form the insulating layer; And remove the metal foil to expose the insulation layer.

12. The method of manufacturing a circuit board as claimed in claim 11, wherein the method of removing the metal foil is etching.

13. The method for manufacturing a circuit board as described in claim 10, further comprising: The substrate is cut to form a plurality of circuit substrates, each of the circuit substrates having a side edge; A heat-dissipating insulating layer is formed on one side of the circuit board, wherein the heat-dissipating insulating layer is in thermal contact with the thermally conductive insulating layer.

14. The method of manufacturing a circuit board as claimed in claim 10, wherein the thermally conductive insulating layer is located between the conductive metal layer and the substrate.

15. A method of manufacturing a circuit board as claimed in claim 10, wherein the conductive metal layer is located between the thermally conductive insulating layer and the substrate.

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