System and method for an extended buried oxide layer for silicon photonic integrated circuits

The wafer-to-wafer hybrid bonding process addresses the limitations of buried oxide layer thickness by extending it and integrating optical and electronic components, enhancing optical coupling and alignment, thus improving semiconductor device performance and yield.

TW202627565APending Publication Date: 2026-07-01MIXX TECHNOLOGIES INC
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Patent Information

Application Number
TW114135990
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-09-18
Filing Date
2025-09-18
Publication Date
2026-07-01

AI Technical Summary

Technical Problem

The integration of photonic and electronic components in semiconductor devices is hindered by limitations in back-end manufacturing processes, particularly due to the thickness of the buried oxide layer in silicon-on-insulator wafers, which restricts optical mode size and increases optical losses and alignment complexity.

Method used

A wafer-to-wafer hybrid bonding process is employed to extend the buried oxide layer, allowing for larger optical modes and reduced alignment requirements, incorporating through-silicon vias, through-dielectric vias, and optical components like mirrors to enhance optical coupling and electrical connections.

Benefits of technology

This approach improves manufacturing yield and performance by supporting larger optical modes, simplifying alignment, and reducing optical coupling losses, making it suitable for high-performance computing and telecommunications applications.

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Abstract

A device and method of manufacturing a semiconductor device with integrated photonic and electronic components is described. The method may include: providing a silicon-on-insulator (SOI) wafer having a silicon handle wafer, a buried oxide (BOX) layer, and a silicon waveguide layer; forming a photonic integrated circuit (PIC) including one or more of the waveguide or a metal layer; removing the silicon wafer to expose the BOX layer; and extending the BOX layer by one or more of: depositing oxide and planarizing onto the BOX layer to increase BOX layer thickness to an extended BOX layer, or fusion bonding a second wafer with a surface oxide layer. The device may include a photonic integrated circuit (PIC), an additional oxide layer, and an integrated optical component positioned to reflect or reshape optical signals within a waveguide layer vertically.
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