Method and system for transistor with combined source and well contact
TW202628630APending Publication Date: 2026-07-01DIODES INC
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Patent Information
- Application Number
- TW114112499
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-02-28
- Filing Date
- 2025-04-01
- Publication Date
- 2026-07-01
Abstract
A metal-oxide-semiconductor (MOS) transistor includes a substrate including a well region, an insulator layer coupled to the substrate, and a source including a source region, a source contact passing through the insulator layer and the source region, and an ohmic contact disposed in the well region. The MOS transistor also includes a gate region including a gate insulator layer and a gate contact and a drain including a drain region and a drain contact passing through the insulator layer to the drain region. The MOS transistor can be an LDMOS transistor, for example, an LNDMOS or LPDMOS transistor.
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