Optical line termination device and bandwidth allocation method

Abstract

An optical line termination device includes a feedback circuit and a bandwidth allocation circuit. The feedback circuit is configured to receive a buffer size signal from an optical network circuit, and execute a feedback process to the buffer size signal to generate a feedback signal. The bandwidth allocation circuit is configured to provide a bandwidth to the optical network circuit according to the feedback signal.

Description

[Technical Field]

[0001] This case relates to central office equipment and bandwidth allocation methods, and in particular to central office equipment and bandwidth allocation methods that employ feedback circuits to provide appropriate bandwidth so as to efficiently transmit all buffered data of the terminal equipment. [Previous Technology]

[0002] In a Gigabit-Capable Passive Optical Network (GPON), the optical network unit (ONU) periodically reports the amount of data (such as the amount of data to be transmitted) that has been buffered in the OLT. The OLT then provides bandwidth to the ONU based on the amount of data that has been buffered, so that the ONU can send its buffered data.

[0003] However, there is a time difference between the time when the terminal device reports the amount of cached data and the time when the bandwidth is actually obtained. The cached data added during the time difference cannot be sent through the bandwidth actually obtained, which results in the terminal device's buffer always having residual cached data. [Summary of the Invention]

[0004] In view of the shortcomings of the prior art, one of the objectives of this application is (but not limited to) to provide a central office device and a bandwidth allocation method to improve the shortcomings of the prior art.

[0005] In some embodiments, the central office device includes a feedback circuit and a bandwidth allocation circuit. The feedback circuit is used to receive a buffer size signal from the terminal device and to perform feedback processing on the buffer size signal to generate a feedback signal. The bandwidth allocation circuit is used to provide bandwidth to the terminal device according to the feedback signal.

[0006] In some embodiments, the bandwidth allocation method can be applied to the central office device. The bandwidth allocation method includes the following steps: receiving a buffer size signal from the terminal device through the feedback circuit of the central office device, and performing feedback processing on the buffer size signal to generate a feedback signal; and providing bandwidth to the terminal device through the bandwidth allocation circuit of the central office device according to the feedback signal.

[0007] The technical means embodied in the embodiments of this case can improve at least one of the disadvantages of the prior art. The central office device and bandwidth allocation method of this case use a feedback circuit to provide appropriate bandwidth to the terminal device, thereby efficiently transmitting all the buffered data of the terminal device and avoiding residual data in the buffer of the terminal device.

[0008] Regarding the features, implementation and effects of this case, the preferred embodiments are described in detail below with reference to the drawings.

Implementation Method

[0009] All terms used herein have their common meanings. The definitions of the terms mentioned above in commonly used dictionaries, and any examples of the use of any term discussed herein, are merely illustrative and should not limit the scope or meaning of this application. Similarly, this application is not limited to the various embodiments shown in this specification.

[0010] In order to improve the problem of residual buffer data in the buffer of the terminal device, this case proposes a central office device and a bandwidth allocation method, which are described in detail below.

[0011] Figure 1 is a schematic diagram of a central office device 100 and a terminal device 900 according to some embodiments of the present invention. As shown in the figure, the central office device 100 includes a feedback circuit 110 and a bandwidth allocation circuit 120, and the terminal device 900 includes a scheduler 910 and a buffer 920. To make the operation of the central office device 100 easier to understand, please also refer to Figure 2, which is a flowchart of a bandwidth allocation method 200 according to some embodiments of the present invention.

[0012] Referring to Figures 1 and 2, in step 210, the terminal device 900 receives the buffer size signal through the feedback circuit 110 of the central office device 100, and performs feedback processing on the buffer size signal to generate a feedback signal. For example, the scheduler 910 of the terminal device 900 can obtain the size of the buffered data from the buffer 920, and transmit the buffer size signal to the feedback circuit 110 accordingly. Subsequently, the feedback circuit 110 receives the buffer size signal transmitted from the terminal device 900, and performs feedback processing on the buffer size signal to generate a feedback signal.

[0013] In step 220, the bandwidth allocation circuit 120 of the central office device 100 provides bandwidth to the terminal device 900 according to the feedback signal. For example, the bandwidth allocation circuit 120 receives the feedback signal transmitted from the feedback circuit 110, and then provides appropriate bandwidth to the terminal device 900 according to the feedback signal, thereby efficiently transmitting all the buffered data in the buffer 920 of the terminal device 900, avoiding (e.g., clearing or reducing) the residual data in the buffer 920 of the terminal device 900.

[0014] Compared to the prior art which directly uses the buffer size signal of the terminal device 900 as the basis for bandwidth allocation, the central office device 100 and the bandwidth allocation method 200 of this case can use the feedback circuit 110 to further perform feedback processing on the buffer size signal of the terminal device 900 to generate a feedback signal. Then, the bandwidth allocation circuit 120 provides a suitable bandwidth according to the above feedback signal, thereby efficiently transmitting all the buffered data of the buffer 920 of the terminal device 900. This will be explained in detail later.

[0015] In some embodiments, the central office device 100 and the terminal device 900 of this invention can be applied in a Gigabit-Capable Passive Optical Network (GPON). The central office device 100 can be an optical line termination (OLT), the terminal device 900 can be an optical network unit (ONU), and the buffer size signal can include (or be) the transmitter buffer size.

[0016] Figure 3 is a schematic diagram of a central office device 100 according to some embodiments of this case. As shown, the feedback circuit 110 includes a loop filter 1110. The loop filter 1110 is used to receive a buffer size signal from the terminal device 900, filter the buffer size signal to generate a feedback signal, and output the feedback signal to the bandwidth allocation circuit 120. For example, the scheduler 910 of the terminal device 900 can obtain the size of the buffered data from the buffer 920 and transmit the buffer size signal to the loop filter 1110 accordingly. Subsequently, the loop filter 1110 receives the buffer size signal transmitted from the terminal device 900, filters the buffer size signal to generate a feedback signal, and then outputs the feedback signal to the bandwidth allocation circuit 120.

[0017] In some embodiments, the loop filter 1110 of the feedback circuit 110 includes a first multiplier 1111, a second multiplier 1112, a first adder 1113, a second adder 1114, and an integrator 1115. The second multiplier 1112 is coupled to the first multiplier 1111 at the first input terminal Tin1 of the loop filter 1110 of the feedback circuit 110. The first adder 1113 is coupled to the second multiplier 1112. The second adder 1114 is coupled to the first multiplier 1111, the first adder 1113, and the first output terminal Tout1 of the loop filter 1110 of the feedback circuit 110. The integrator 1115 is coupled between the second input terminal Tin2 and the second output terminal Tout2 of the first adder 1113.

[0018] In some embodiments, the first multiplier 1111 is used to perform multiplication calculation on the buffer size signal according to the first parameter G1 to generate a first multiplication result. The second multiplier 1112 is used to perform multiplication calculation on the buffer size signal according to the second parameter G2 to generate a second multiplication result. The integrator 1115 first receives the second multiplication result from the second multiplier 1112 through the first adder 1113, and then performs integration calculation on the second multiplication result to generate an integral feedback result. The first adder 1113 is used to perform addition calculation on the second multiplication result transmitted from the second multiplier 1112 and the integral feedback result fed back by the integrator 1115 to generate a first addition result. The second adder 1114 is used to perform addition calculation on the first multiplication result and the first addition result to generate a second addition result as a feedback signal, and outputs the feedback signal to the bandwidth allocation circuit 120.

[0019] As shown above, the loop filter 1110 of this invention can lock the bandwidth by the buffer size, and its principle is similar to that of a phase-locked loop (PLL). The buffer size of this invention is similar to the phase in a PLL application. Furthermore, the bandwidth (such as the ingress rate) of this invention is similar to the frequency in a PLL application. A PLL locks the frequency by the phase. The aforementioned phase is the integral of frequency over time, and a PLL can make the phase error approach zero. Similarly, the loop filter 1110 of this invention locks the bandwidth (such as the ingress rate) by the buffer size. The aforementioned buffer size is the integral of bandwidth (such as the ingress rate) over time, and the loop filter 1110 of this invention can also make the buffered data in the buffer 920 of the terminal device 900 approach zero. The loop filter 1110 in this case can process the buffer size to provide a suitable bandwidth to the terminal device 900, thereby efficiently transmitting all the buffered data in the buffer 920 of the terminal device 900 and avoiding residual data in the buffer 920 of the terminal device 900.

[0020] In some embodiments, the first parameter G1 is greater than the second parameter G2. For example, the first parameter G1 and the second parameter G2 are used to adjust the tracking bandwidth (such as the ingress rate), the first parameter G1 can be set to 1, and the second parameter G2 can be set to 0.25. However, this invention is not limited to the above embodiments, which are only used to illustrate one implementation method of this invention. In other embodiments, the first parameter G1 and the second parameter G2 of this invention can adopt other suitable values, depending on the actual needs.

[0021] In some embodiments, if the bandwidth includes a fixed bandwidth, the loop filter 1110 of the feedback circuit 110 includes a first-order loop filter. For example, if the bandwidth provided to the terminal device 900 by the bandwidth allocation circuit 120 is a fixed bandwidth, such as the bandwidth allocation circuit 120 providing a bandwidth of 80 MB / s to the terminal device 900, then the loop filter 1110 may be a first-order loop filter. Furthermore, if the bandwidth allocation circuit 120 provides different bandwidths to the terminal device 900 at regular intervals, for example, the bandwidth allocation circuit 120 provides a bandwidth of 80 MB / s to the terminal device 900 in a first period (e.g., 1 millisecond (ms)) and a bandwidth of 240 MB / s to the terminal device 900 in a second period (e.g., 1.5 milliseconds (ms)), then the loop filter 1110 may also be a first-order loop filter.

[0022] In some embodiments, the feedback circuit 110 includes an idle packet calculator 1120, which is used to receive at least one idle packet from the terminal device 900 and calculate an idle signal based on the number of at least one idle packet. The loop filter 1110 is used to receive the idle signal or the buffer size signal, filter the idle signal or the buffer size signal to generate a feedback signal, and output the feedback signal to the bandwidth allocation circuit 120.

[0023] For example, in the prior art, the buffer size reported by the terminal device 900 is always greater than or equal to zero. If the bandwidth allocation circuit 120 allocates excessive bandwidth to the terminal device 900, the terminal device 900 will still report a buffer size greater than or equal to zero, which will cause the bandwidth allocation circuit 120 to continuously allocate excessive bandwidth. To solve this problem, the central office device 100 of this invention is further provided with an idle packet calculator 1120. If the bandwidth allocation circuit 120 allocates excessive bandwidth to the terminal device 900, the terminal device 900 will start sending idle packets after it has sent all the buffered data in the buffer 920. The idle packet calculator 1120 counts the number of idle packets and reports idle values ​​(such as negative values) less than zero to the loop filter 1110. The loop filter 1110 then filters these idle values ​​(such as negative values) to generate a feedback signal. When the bandwidth allocation circuit 120 receives the feedback signal, it can determine that excessive bandwidth has been allocated to the terminal device 900 and accordingly provides less bandwidth to the terminal device 900. After each report of idle values, the idle packet calculator 1120 clears its count value to prepare for the next counting procedure.

[0024] In some embodiments, the feedback circuit 110 includes a multiplexer 1130, which is used to receive a buffer size signal from the terminal device 900 and an idle signal from the idle packet calculator 1120, and to provide the idle signal or buffer size signal to the loopback filter 1110.

[0025] Figure 4 is a schematic diagram illustrating the relationship between bandwidth and time according to some embodiments of this case. As shown in the figure, curve C1 represents the bandwidth actually required by the terminal device 900. Curve C2 represents the bandwidth provided by the prior art central office device 100 to the terminal device 900. As can be seen from the figure, there is always a time difference between the bandwidth provided by the prior art central office device 100 to the terminal device 900 and the bandwidth actually required by the terminal device 900. During the time difference, the newly added buffered data cannot be transmitted through the obtained bandwidth, resulting in residual buffered data always remaining in the buffer 920 of the terminal device 900.

[0026] In some embodiments, curve C3 represents the bandwidth provided by the central office device 100 to the terminal device 900. As shown in the figure, the bandwidth allocation circuit 120 of the central office device 100 can detect a bandwidth change and provide bandwidth plus additional bandwidth to the terminal device 900 during the initial period of the bandwidth change. For example, if the bandwidth change includes a bandwidth increase change, such as the bandwidth increasing from 0 to 80MB / s, the bandwidth allocation circuit 120 provides bandwidth plus additional bandwidth to the terminal device 900 during the initial period of the bandwidth change, thereby efficiently transmitting all the buffered data of the terminal device 900 and avoiding residual data in the buffer 920 of the terminal device 900.

[0027] Figure 5 is a schematic diagram illustrating the relationship between the total amount of buffered data and time according to some embodiments of this case. As shown in the figure, curve C1 represents the actual total amount of buffered data in the buffer 920 of the terminal device 900. Curve C2 represents the total amount of buffered data transmitted by the prior art terminal device 900. As can be seen from the figure, the total amount of buffered data transmitted by the terminal device 900 always lags behind the actual total amount of buffered data in the buffer 920 of the terminal device 900, which results in the buffer 920 of the terminal device 900 always having residual buffered data.

[0028] In some embodiments, curve C3 represents the total amount of buffered data transmitted by the terminal device 900 in this case. As can be seen from the figure, the total amount of buffered data transmitted by the terminal device 900 is almost the same as the actual total amount of buffered data in the buffer 920 of the terminal device 900, so as to efficiently send all the buffered data of the terminal device 900 and avoid residual data in the buffer 920 of the terminal device 900.

[0029] Figure 6 is a schematic diagram illustrating the relationship between the amount of buffered residual data and time according to some embodiments of this case. As shown in the figure, curve C1 represents the actual amount of buffered residual data in the buffer 920 of the prior art terminal device 900 (meaning that the allocated bandwidth is insufficient to send all the data in the temporary storage). As can be seen from the figure, the buffer 920 of the prior art terminal device 900 always has residual buffered data.

[0030] In some embodiments, curve C2 represents the actual amount of buffered residual data in the buffer 920 of the terminal device 900 of this invention. As can be seen from the figure, the buffered data of the terminal device 900 can be sent efficiently in its entirety, thus avoiding residual data in the buffer 920 of the terminal device 900.

[0031] Figure 7 is a schematic diagram of a loop filter 1110 of the central office device 100 shown in Figure 3 according to another embodiment of the present invention. As shown, if the bandwidth of the central office device 100 includes a bandwidth that varies with time, the loop filter 1110A of the central office device 100 can be a second-order loop filter. For example, when the bandwidth (such as the ingress rate) is time-varying, for example, when the bandwidth (such as the ingress rate) is (the bandwidth gradually increases with time t), as long as the loop filter 1110A is upgraded to a second-order loop filter (such as the second-order loop filter shown in Figure 7), the bandwidth allocation circuit 120 can provide a suitable bandwidth so that the buffered data of the terminal device 900 can be transmitted efficiently in its entirety, avoiding residual data in the buffer 920 of the terminal device 900. Furthermore, when the bandwidth (such as the ingress rate) is time-varying, for example, when the bandwidth (such as the ingress rate) increases exponentially with time, as long as the order of the loop filter 1110A is upgraded to a third-order loop filter, the bandwidth allocation circuit 120 can also provide a suitable bandwidth so that the buffered data of the terminal device 900 can be transmitted efficiently in its entirety, avoiding residual data in the buffer 920 of the terminal device 900.

[0032] It should be noted that this case is not limited to the embodiments shown in Figures 1 to 7, but is only used to illustrate one of the implementation methods of this case to make the technology of this case easy to understand. The patent scope of this case shall be determined by the scope of the invention application. Modifications and refinements made by those skilled in the art to the embodiments of this case without departing from the spirit of this case still fall within the scope of the invention application.

[0033] In summary, the local terminal device 100 and the bandwidth allocation method 200 of this case use a feedback circuit 110 to provide appropriate bandwidth to the terminal device 900, thereby efficiently transmitting all the buffered data of the terminal device 900 and avoiding residual data in the buffer 920 of the terminal device 900.

[0034] Although the embodiments of this case are described above, these embodiments are not intended to limit this case. Those skilled in the art can make changes to the technical features of this case based on the explicit or implicit content of this case. All such changes may fall within the scope of patent protection sought in this case. In other words, the scope of patent protection of this case shall be determined by the scope of the patent application in this specification. [Simplified Explanation of the Diagram]

[0035] Figure 1 is a schematic diagram of a central office device and a terminal device according to some embodiments of the present invention; Figure 2 is a flowchart of a bandwidth allocation method according to some embodiments of the present invention; Figure 3 is a schematic diagram of a central office device according to some embodiments of the present invention; Figure 4 is a schematic diagram of the relationship between bandwidth and time according to some embodiments of the present invention; Figure 5 is a schematic diagram of the relationship between the total amount of data accumulated in the buffer and time according to some embodiments of the present invention; Figure 6 is a schematic diagram of the relationship between the amount of residual data in the buffer and time according to some embodiments of the present invention; and Figure 7 is a schematic diagram of the feedback circuit of the central office device shown in Figure 1 according to another embodiment of the present invention.

Claims

1. A central office device, comprising: a feedback circuit for receiving a buffer size signal from a terminal device and performing feedback processing on the buffer size signal to generate a feedback signal; and a bandwidth allocation circuit for providing bandwidth to the terminal device according to the feedback signal; wherein the feedback circuit comprises: a loop filter for receiving the buffer size signal from the terminal device, performing filtering processing on the buffer size signal to generate the feedback signal, and outputting the feedback signal to the bandwidth allocation circuit.

2. The central office device as claimed in claim 1, wherein the feedback circuit includes: a first multiplier; A second multiplier is coupled to a first input terminal of the feedback circuit; a first adder is coupled to the second multiplier; and a second adder is coupled to the first multiplier, the first adder, and a first output terminal of the feedback circuit. and an integrator coupled between a second input and a second output of the first adder.

3. The central office apparatus as claimed in claim 1, wherein the feedback circuit comprises: a first multiplier for multiplying the buffer size signal according to a first parameter to generate a first multiplication result; a second multiplier for multiplying the buffer size signal according to a second parameter to generate a second multiplication result; an integrator for integrating the second multiplication result to generate an integrated feedback result; a first adder for adding the second multiplication result and the integrated feedback result to generate a first addition result; and a second adder for adding the first multiplication result and the first addition result to generate a second addition result as the feedback signal, and outputting the feedback signal to the bandwidth allocation circuit.

4. The central office device as described in claim 3, wherein the first parameter is greater than the second parameter.

5. The central office device as claimed in claim 1, wherein if the bandwidth includes a fixed bandwidth, the feedback circuit includes a first-order loop filter, and wherein if the bandwidth includes a time-varying bandwidth, the feedback circuit includes a second-order loop filter.

6. The central office device as claimed in claim 1, wherein the feedback circuit comprises: an idle packet calculator for receiving at least one idle packet from the terminal device and calculating an idle signal based on a quantity of the at least one idle packet; wherein the loop filter is used to receive the idle signal or the buffer size signal, perform the filtering process on the idle signal or the buffer size signal to generate the feedback signal, and output the feedback signal to the bandwidth allocation circuit.

7. The central office device as described in claim 6, wherein the feedback circuit comprises: a multiplexer for receiving the buffer size signal from the terminal device and the idle signal from the idle packet calculator, and providing the idle signal or the buffer size signal to the loop filter.

8. The central office device as claimed in claim 1, wherein the bandwidth allocation circuit detects a bandwidth change and provides the bandwidth and an additional bandwidth to the terminal device during an initial period of the bandwidth change, wherein if the bandwidth change includes a bandwidth increase change, the bandwidth allocation circuit provides the bandwidth plus the additional bandwidth to the terminal device during the initial period of the bandwidth change.

9. A bandwidth allocation method applied to an exchange-travel device, comprising: receiving a buffer size signal from a terminal device through a feedback circuit of the exchange-travel device, and performing a feedback processing on the buffer size signal to generate a feedback signal; and providing bandwidth to the terminal device according to the feedback signal through a bandwidth allocation circuit of the exchange-travel device; wherein the step of receiving the buffer size signal from the terminal device through the feedback circuit of the exchange-travel device and performing the feedback processing on the buffer size signal to generate the feedback signal comprises: receiving the buffer size signal from the terminal device through a loop filter of the feedback circuit, performing a filtering processing on the buffer size signal to generate the feedback signal, and outputting the feedback signal to the bandwidth allocation circuit.

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