Non-volatile memory device having vertical channels and methods of fabrication thereof
TW202630744APending Publication Date: 2026-07-16INFINEON TECHNOLOGIES LLC
View PDF 0 Cites 0 Cited by
Patent Information
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- INFINEON TECHNOLOGIES LLC
- Filing Date
- 2025-09-11
- Publication Date
- 2026-07-16
Smart Images

Figure TWG2TA001068537_001 
Figure TWG2TA001068537_002 
Figure TWG2TA001068537_003
Abstract
Semiconductor devices and methods of manufacturing the same are provided. The semiconductor devices may include a non-volatile memory (NVM) transistor form over a substrate having a buried lower source / drain (S / D) junction, an upper S / D junction, a vertical channel having a cylindrical shape disposed between the upper and lower S / D junctions, a cylindrical memory film stack surrounding the vertical channel, and a gate layer disposed around the memory film stack. The semiconductor devices may also include word lines surrounding the vertical channels, bit lines and source lines connecting multiple NVM transistors. Other embodiments are also described.
Need to check novelty before this filing date? Find Prior Art