Semiconductor die including a transistor coupled to a contact layer wherein the contact layer includes a metal contact having a sidewall with a reduced height to promote connectivity with an adjacent via

TW202630765APending Publication Date: 2026-07-16QUALCOMM INC
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Patent Information

Application Number
TW114134461
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-09-24
Filing Date
2025-09-09
Publication Date
2026-07-16
Patent Text Reader

Abstract

Aspects disclosed include a semiconductor die including a transistor coupled to a contact layer wherein the contact layer includes a metal contact having a sidewall with a reduced height to promote connectivity with an adjacent via. The die comprises the contact layer adjacent to an epitaxial layer of the transistor. The contact layer comprises a metal contact adjacent to the epitaxial layer and having a first height. The metal contact comprises a plurality of sidewalls wherein at least one of the plurality of sidewalls has a second height which is less than the first height resulting in increased metal at a surface of the metal contact. The die further comprising a via layer adjacent to the contact layer. The via layer comprising a via adjacent to the surface of the metal contact increasing the connectivity between the via and the metal contact.
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