Stacking transistor structure and methods of forming the same

Abstract

A method includes patterning a first opening through a first dielectric layer, a first source / drain region, and a second dielectric layer to expose and second source / drain region; forming a first dielectric liner along sidewalls of the first opening, wherein the second source / drain region is exposed; forming a first metal-semiconductor alloy region in the first opening along the second source / drain region; depositing a first conductive material to fill a remainder of the first opening; patterning a second opening through the first dielectric layer to expose the first source / drain region; forming a second dielectric liner along sidewalls of the second opening, wherein the first source / drain region is exposed; forming a second metal-semiconductor alloy region in the second opening along the first source / drain region; and depositing a second conductive material to fill a remainder of the second opening.