Transistor structure
TW202630955APending Publication Date: 2026-07-16INVENTION & COLLABORATION LABORATORY INC
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Patent Information
- Application Number
- TW114148708
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-10-30
- Filing Date
- 2025-12-11
- Publication Date
- 2026-07-16
Abstract
A transistor structure includes a semiconductor substrate, a shallow trench isolation (STI) region, a gate region, a first conductive region and an inter-layer dielectric (ILD) portion. The semiconductor substrate has a three-dimensional (3D) semiconductor body and a horizontal semiconductor surface. The shallow trench isolation (STI) region surrounds a lower portion of the 3D semiconductor body. The gate region crosses over an upper portion of the 3D semiconductor body. The first conductive region is electrically coupled to a channel region within the upper portion of the 3D semiconductor body. The inter-layer dielectric (ILD) portion is over the STI portion and surrounds the first conductive region. A high thermal conductivity (HTC) material is deposited within the STI portion and / or the ILD portion, and a thermal conductivity of the HTC material is higher than that of SiO2.
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