Multi-chip package and memory system

Abstract

Provided is a multi-chip package including: a printed circuit board (PCB) extending in a first direction and a second direction, wherein the second direction crosses the first direction; and a plurality of memory chips stacked on the PCB in a third direction, wherein the plurality of memory chips are configured to communicate with an external memory controller through a signal transmission line and to share the signal transmission line, wherein the third direction is perpendicular to the first direction and the second direction, wherein each of the plurality of memory chips includes a respective one of a plurality of on-die termination (ODT) circuits coupled to the signal transmission line, and wherein each of the plurality of memory chips is configured to individually set a resistance value of the respective one of the plurality of ODT circuits based on respective position information of the respective memory chip relative to a surface of the PCB.

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