Semiconductor package including a molded underfill structure

Abstract

A semiconductor package includes a package substrate including a body layer and a first insulating layer disposed on the body layer; first and second semiconductor chips mounted on the package substrate; and a molding layer filling the spaces between the package substrate and the first and second semiconductor chips, and surrounding the first and second semiconductor chips, wherein the body layer includes a first chip overlapping region that vertically overlaps the first semiconductor chip, a second chip overlapping region that vertically overlaps the second semiconductor chip and an intermediate region between the first chip overlapping region and the second chip overlapping region, and wherein the first insulating layer includes a first opening that exposes the intermediate region, an edge section of the first chip overlapping region abutting the intermediate region and an edge section of the second chip overlapping region abutting the intermediate region.