Semiconductor package with high routing density patch
TW202630984APending Publication Date: 2026-07-16AMKOR TECH SINGAPORE HLDG PTE LTD
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Patent Information
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- AMKOR TECH SINGAPORE HLDG PTE LTD
- Filing Date
- 2016-04-14
- Publication Date
- 2026-07-16
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Figure TWG2TA001069403_001 
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Abstract
Methods and systems for a semiconductor package with high routing density routing patch are disclosed and may include a semiconductor die bonded to a substrate and a high routing density patch bonded to the substrate and to the semiconductor die, wherein the high routing density patch comprises a denser trace line density than the substrate. The high routing density patch can be a silicon-less-integrated module (SLIM) patch, comprising a BEOL portion, and can be TSV-less. Metal contacts may be formed on a second surface of the substrate. A second semiconductor die may be bonded to the substrate and to the high routing density patch. The high routing density patch may provide electrical interconnection between the semiconductor die. The substrate may be bonded to a silicon interposer. The high routing density patch may have a thickness of
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