Process and apparatus for depositing a capping layer on metal pads

Abstract

A method includes, performing, by a chemical mechanical polishing (CMP) processing system, a CMP process on patterned device structures comprising an interconnect material disposed over a dielectric layer disposed over a substrate. The dielectric layer includes interconnect structures etched therein, wherein the interconnect material fills the interconnect structures, and is disposed over the interconnect structures and a field region of the dielectric layer. The CMP process removes portions of the interconnect material disposed on the field region of the dielectric layer and exposes pads within the interconnect structures of the patterned device structures. The method further includes depositing a capping layer using a capping layer deposition process over the exposed pads of the patterned device structures.

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