Photodetector assembly having three-dimensional inductor

Abstract

A photodetector assembly comprises: a stacked structure having a cladding layer, a buried oxide layer, a semiconductor substrate, wherein the cladding layer includes a first side and a second opposed side which abuts a first side of the buried oxide layer, wherein the semiconductor substrate includes a first side which abuts a second opposed side of the buried oxide layer and further includes a second opposed side; a photodetector device embedded in the stacked structure; an inductor operably coupled to the photodetector device, wherein the inductor is arranged on the first side of the cladding structure and at least partially traverses the stacked structure; a signal electrode operably coupled to the photodetector device by using the inductor; and at least one ground electrode operably coupled to the photodetector device, wherein the signal electrode and the ground electrode are arranged on the first side of the cladding layer.

Description

[Technical Field]

[0001] The present invention relates to an optoelectronic device, and more particularly to a high-speed photodetector having an on-chip inductor with a three-dimensional structure design to achieve a smaller inductor footprint. [Previous Technology]

[0002] Recently, driven by new technologies such as cloud computing and artificial intelligence (AI), the amount of data generated daily is growing exponentially, posing significant challenges to current optical interconnect systems. Furthermore, long-distance telecommunications and data center data communications also require high-speed interconnects. To increase interconnect capacity, high-speed optical detectors, as key components of high-speed interconnect systems, are highly sought after. In addition, high-speed optical detectors also have applications in heterodyne and coherent detection, as well as millimeter-wave signal generation.

[0003] Photodetectors typically convert received optical signals into output electrical signals. Furthermore, high-speed photodetectors can detect rapidly changing optical signals.

[0004] A photodetector device typically includes various components, such as a device layer, a light-absorbing layer, a light-coupled structure, a metal connection layer, electrodes, and a passivation layer. These device components are positioned close to each other for the operation of the photodetector. The positioning and proximity of these components inevitably lead to unintended capacitances between them, called parasitic capacitances. Parasitic capacitances are usually present at the junctions of two or more components or between electrodes. Such capacitances can affect the overall performance of the photodetector, such as limiting the operating speed of the photodetector.

[0005] To address the above problems, on-chip inductors have been developed, in which the inductor can be connected to the electrodes of a photodetector to offset some of the parasitic capacitance and improve the bandwidth of the photodetector through impedance peaks. However, on-chip inductors significantly increase the footprint of the impedance peak photodetector, thus limiting their applications. [Summary of the Invention]

[0006] According to one embodiment, a photodetector assembly is provided, the photodetector assembly comprising: a stacked structure having a cladding layer, a buried oxide layer, and a semiconductor substrate, wherein the cladding layer includes a first side and an opposing second side, the second side being adjacent to the first side of the buried oxide layer, wherein the semiconductor substrate includes a first side and an opposing second side, the first side being adjacent to the opposing second side of the buried oxide layer; a photodetector device embedded in the stacked structure; an inductor operatively coupled to the photodetector device, wherein the inductor is arranged on the first side of the cladding structure and at least partially traverses the stacked structure; a signal electrode operatively coupled to the photodetector device using the inductor; and at least one ground electrode operatively coupled to the photodetector device, wherein the signal electrode and the ground electrode are arranged on the first side of the cladding layer.

[0007] In some embodiments, the inductor includes: a plurality of first conductive layers embedded in the stacked structure; a plurality of second conductive layers arranged on the first side of the covering layer; and a plurality of vias passing through the stacked structure and interconnecting the first conductive layers and the second conductive layers respectively.

[0008] In some embodiments, the first conductive layer is embedded in the cladding layer and arranged on the first side of the embedded oxide layer, wherein the vias at least partially penetrate the cladding layer. The height of the second vias may be between 1 micrometer and 10 micrometers.

[0009] In some embodiments, the first conductive layer is embedded in the buried oxide layer, wherein the via completely penetrates the overlay layer and at least partially penetrates the buried oxide layer. The height of the second via may be between 2 micrometers and 20 micrometers.

[0010] In some embodiments, the first conductive layer is arranged on the second side of the semiconductor substrate, wherein the via completely penetrates the cladding layer, the buried oxide layer, and the semiconductor substrate. The height of the second via may be between 100 micrometers and 1000 micrometers.

[0011] In some embodiments, the inductor includes a coil arrangement, wherein the axis of the coil arrangement is parallel to the plane direction of the cladding layer, the buried oxide layer and the semiconductor substrate.

[0012] In some embodiments, the coil arrangement includes a square or rectangular cross-sectional profile along a plane passing through the cladding layer, the embedded oxide layer, and the semiconductor substrate.

[0013] In some embodiments, the photodetector is embedded in the cladding layer or arranged on the first side of the semiconductor substrate.

[0014] In some embodiments, the at least one ground electrode includes two or more ground electrodes arranged on the first side of the cladding layer and operatively coupled to the photodetector device.

Implementation Method

[0015] In the following description, numerous specific details are set forth to provide a thorough understanding of various exemplary and non-limiting embodiments. However, those skilled in the art will understand that embodiments of the invention may be practiced without some or all of these specific details. It should be understood that the terminology used herein is for the purpose of illustrating particular embodiments only and is not intended to limit the scope of the invention. In the drawings, similar reference numerals or numbers consistently refer to the same or similar functions or features in several views.

[0016] Features described in one embodiment may be adapted accordingly to the same or similar features in other embodiments. Features described in one embodiment may be adapted accordingly to other embodiments, even if not explicitly described in those other embodiments. Furthermore, additions and / or combinations and / or substitutions of features described in one embodiment may be adapted accordingly to the same or similar features in other embodiments.

[0017] It should be understood that the articles “a” and “the” used with respect to a feature or element include references to one or more of the features or elements. The term “and / or” includes any and all combinations of one or more of the associated features or elements. Any of the terms “comprising,” “including,” “having,” and related terms used in the description and claims are intended to be open-ended and mean that additional features or elements may exist in addition to those listed. Identifiers such as “first,” “second,” and “third” are used merely as labels and are not intended to impose numerical requirements on their objects, nor are they interpreted in any way that imposes any relative position or temporal order between limitations. The term “to” may include references to “configured as,” “suitable for,” and “constructed and arranged,” and these terms are used interchangeably.

[0018] The terms "coupling" and the phrase "operably coupled" may be used to include references in an operational sense, and may also include, but are not limited to, physical, optical, and / or electrical connections or couplings, which may be direct or indirect. Thus, for example, two devices may be directly coupled or connected, or indirectly coupled through one or more intermediate devices. Based on this disclosure, those skilled in the art will understand that various coupling methods exist according to the above definitions. The terms "coupling" and "connection" are used interchangeably. The term "operably" includes references to the term "operably".

[0019] The term "adjacent" and related terms may include references to "arranged on" or "arranged in contact with", which are used interchangeably.

[0020] The embodiment provides a high-speed photodetector assembly, each assembly having an on-chip three-dimensional inductor, which can reduce the area occupied by the photodetector assembly and the inductor, while introducing inductance to offset the parasitic capacitance of the photodiode through impedance peaks and enhance bandwidth.

[0021] In an embodiment, the photodetector assembly includes a stacked structure; a photodetector device embedded in the stacked structure; an inductor operatively coupled to the photodetector device, wherein the inductor is arranged on the stacked structure and at least partially traverses the stacked structure to provide a three-dimensional inductor structure; a signal electrode operatively coupled to the photodetector device using the inductor and arranged on the stacked structure; and at least one ground electrode operatively coupled to the photodetector device and arranged on the stacked structure. The signal electrode, ground electrode, and at least a portion of the inductor are arranged on the same side of the stacked structure. The stacked structure may include a silicon-on-insulator (SOI) structure.

[0022] Referring to Figures 1A and 1B, a photodetector assembly 100 conforming to one embodiment is shown. In this embodiment, a signal electrode 103 and two ground electrodes 104 are provided; an inductor 120 at least partially traverses a stacked structure 105, for example, the inductor 120 partially traverses a cladding layer 106 without penetrating the buried oxide layer 110 or the semiconductor substrate 114.

[0023] The photodetector assembly 100 includes a stacked structure 105; a photodetector device 102; a three-dimensional inductor 120; and signal and ground electrodes 103 and 104.

[0024] The stacked structure 105 includes an SOI structure, which includes a cladding layer 106, a buried oxide layer 110, and a semiconductor substrate 114, and can be fabricated using a complementary metal-oxide-semiconductor (CMOS) process. The cladding layer 106 includes a first side 107 and an opposite second side 108. The first side 107 of the cladding layer 106 provides signal and ground electrodes 103, 104, while the second side 108 of the cladding layer 106 is adjacent to the buried oxide layer 110. The cladding layer 106 may include silicon dioxide. The buried oxide layer 110 includes a first side 111 and an opposite second side 112. The first side 111 of the buried oxide layer 110 is adjacent to the second side 108 of the cladding layer 106, while the second side 112 of the buried oxide layer 110 is adjacent to the semiconductor substrate 114. The buried oxide layer 110 may include silicon oxide. Semiconductor substrate 114 includes a first side 115 and an opposing second side 116. The first side 115 of semiconductor substrate 114 is adjacent to the second side 112 of buried oxide layer 110. Semiconductor substrate 114 may include silicon. Stack structure 105 includes a first side similar to the first side 107 of cladding layer 106, and further includes an opposing second side similar to the second side 116 of semiconductor substrate 114.

[0025] The photodetector device 102 is embedded in the stacked structure 105. For example, the photodetector device 102 is embedded in the cladding layer 106 and adjacent to the first side 111 of the buried oxide layer 110. The photodetector device 102 is operable to convert a received optical signal or electromagnetic radiation in a predetermined frequency band into an output electrical signal or current signal, and may include arrangements known to those skilled in the art, such as semiconductor device layers for implementing pn or pin junctions, and therefore not shown.

[0026] The inductor 120 is a three-dimensional structure having a length, width, and height, these dimensions being obtained in mutually perpendicular directions. The length and width provide planar dimensions for the inductor 120 on a first side 107 of the stacked structure 105 or the cladding layer 106, while the height provides a height or depth dimension for the inductor 120 extending at least partially into the stacked structure 105, for example, through the cladding layer 106, or simultaneously through the cladding layer 106 and the buried oxide layer 110, or through the entirety of the cladding layer 106, the buried oxide layer 110, and the semiconductor substrate 114. Thus, the height or depth dimension is perpendicular to the plane defined by the length and width. The height or depth dimension may be substantially similar to, greater than, or much greater than the length and / or width dimensions. Inductor 120 is directly or indirectly coupled to photodetector device 102, for example by using a first via 117 that traverses stack structure 105 (such as cladding layer 106) and interconnects photodetector device 102 and inductor 120.

[0027] The inductor 120 includes a plurality of first conductive layers 121 embedded in a stacked structure 105 and arranged on a first side 111 of a buried oxide layer 110; a plurality of second conductive layers 122 arranged on a first side 107 of the stacked structure 105 or a cladding layer 106; and a plurality of second vias 123 passing through the stacked structure 105 (e.g., the cladding layer 106) and interconnecting the first conductive layers 121 and the second conductive layers 122 respectively. The first conductive layers 121 and the second conductive layers 122 may include the same or different materials, such as, but not limited to, metals and / or conductive materials. The first conductive layers 121 and the second conductive layers 122 may have the same or different thicknesses. The first vias 117 and the second vias 123 may include the same or different materials, such as, but not limited to, metals and / or conductive materials. The first conductive layers 121 and the second conductive layers 122, as well as the vias 117 and 123, may include the same or different materials, such as, but not limited to, metals and / or conductive materials.

[0028] Signal and ground electrodes 103 and 104 are arranged on the first side 107 of the stacked structure 105 or the cladding layer 106. The signal electrode 103 is operatively coupled to the photodetector device 102 via an inductor 120, i.e., the inductor 120 interconnects the signal electrode 103 and the photodetector device 102. The ground electrode 104 is operatively coupled to the photodetector device 102 via a via (e.g., a third via not shown).

[0029] In the embodiments of Figures 1A and 1B, the first conductive layer 121 is embedded in the cladding layer 106. In particular, most of the embedded first conductive layer 121 is adjacent to or arranged on the first side 111 of the buried oxide layer 110. Therefore, the second via 123 at least partially penetrates the cladding layer 106. The distance between most of the first conductive layer 121 and most of the second conductive layer 122 can be expressed as t1, which is similar to the height of the second via 123. This distance t1 generally applies to most of the first conductive layers 121 and the second conductive layers 122 interconnected by the second via 123. However, at least one first conductive layer 121 interconnecting the first via 117 and the corresponding second via 123 may not be arranged on the first side 111 of the buried oxide layer 110, i.e., it may be embedded in the cladding layer 106 while being spaced apart from the first side 111 of the buried oxide layer 110, so the distance between this conductive layer and the corresponding second layer is less than t1 (see the rightmost first conductive layer 121 in Figure 1B). Such a first conductive layer 121 can be arranged at one end of the length of the inductor 120, which is closest to the photodetector device 102, i.e., closest to being coupled to the photodetector device 102. Furthermore, in the embodiments of Figures 1A and 1B, the ground electrode 104 includes two ground electrodes.

[0030] Referring to Figures 2A and 2B, a photodetector assembly 200 conforming to one embodiment is shown. This embodiment is similar to the embodiments of Figures 1A and 1B, except that this embodiment includes a signal electrode 103 and a ground electrode 104. For the sake of brevity, these similar features will not be described again. Therefore, the inductor 220, the first conductive layer 221, the second conductive layer 222, the first via 217, and the second via 223 in Figures 2A and 2B are respectively similar to the inductor 120, the first conductive layer 121, the second conductive layer 122, the first via 117, and the second via 123 in Figures 1A and 1B.

[0031] Referring to Figures 3A and 3B, a photodetector assembly 300 conforming to one embodiment is shown. In this embodiment, a signal electrode 103 and two ground electrodes 104 are provided; an inductor 320 completely penetrates the cladding layer 106 and at least partially penetrates the buried oxide layer 110, but does not penetrate the wafer substrate 114.

[0032] The photodetector assembly 300 includes a stacked structure 105; a photodetector device 102; an inductor 320; and signal and ground electrodes 103, 104. The stacked structure 105, the photodetector device 102, and the signal and ground electrodes 103, 104 are similar to the embodiments of FIG. 1A and 1B, and therefore these similar features will not be described again for the sake of brevity. Therefore, the inductor 320, the first conductive layer 321, the second conductive layer 322, the first via 317, and the second via 323 in FIG. 3A and 3B are similar to the inductor 120, the first conductive layer 121, the second conductive layer 122, the first via 117, and the second via 123 in FIG. 1A and 1B, respectively.

[0033] Inductor 320 is largely similar to inductor 120 in the embodiments of Figures 1A and 1B, except that most of the first conductive layers 321 of inductor 320 in Figures 3A and 3B are embedded in the buried oxide layer 110. Therefore, most of the second vias 323 completely penetrate the cladding layer and at least partially penetrate the buried oxide layer 110. The distance between most of the first conductive layers 321 and most of the second conductive layers 322 can be expressed as t2, which is similar to the height of the second via 323. This distance t2 generally applies to most of the first conductive layers 321 and second conductive layers 322 interconnected by the second vias 323. However, at least one first conductive layer 321 interconnecting the first via 317 and the corresponding second via 323 may not be embedded in the buried oxide layer 110, i.e., it may be embedded in the cladding layer 106 while being spaced from the first side 111 of the buried oxide layer 110, so the distance between this conductive layer and the corresponding second layer is less than t2 (see the rightmost first conductive layer 321 in Figure 3B). Such a first conductive layer 321 may be arranged at one end of the length of the inductor 320, which is closest to the photodetector device 102, that is, closest to the photodetector device 102.

[0034] Referring to Figures 4A and 4B, a photodetector assembly 400 conforming to one embodiment is shown. This embodiment is similar to the embodiments of Figures 3A and 3B, except that this embodiment includes a signal electrode 103 and a ground electrode 104. For the sake of brevity, these similar features will not be described again. Therefore, the inductor 420, the first conductive layer 421, the second conductive layer 422, the first via 417, and the second via 423 in Figures 4A and 4B are respectively similar to the inductor 120, the first conductive layer 121, the second conductive layer 122, the first via 117, and the second via 123 in Figures 1A and 1B.

[0035] Referring to Figures 5A and 5B, a photodetector assembly 500 conforming to one embodiment is shown. In this embodiment, a signal electrode 103 and two ground electrodes 104 are provided; an inductor 520 completely traverses the stacked structure 105, namely the cladding layer 106, the buried oxide layer 110, and the semiconductor substrate 114.

[0036] The photodetector assembly 500 includes a stacked structure 105; a photodetector device 102; an inductor 520; and signal and ground electrodes 103, 104. The stacked structure 105, the photodetector device 102, and the signal and ground electrodes 103, 104 are similar to the embodiments of FIG. 1A and 1B, and therefore these similar features will not be described again for the sake of brevity. Thus, the inductor 520, the first conductive layer 521, the second conductive layer 522, the first via 517, and the second via 523 in FIG. 5A and 5B are respectively similar to the inductor 120, the first conductive layer 121, the second conductive layer 122, the first via 117, and the second via 123 in FIG. 1A and 1B.

[0037] Inductor 520 is largely similar to inductor 120 in the embodiments of Figures 1A and 1B, except that most of the first conductive layers 521 of inductor 520 in Figures 5A and 5B are arranged on the second side 116 of semiconductor substrate 114. In other words, most of the first conductive layers 521 of inductor 520 are not embedded in the stacked structure 105. Therefore, most of the second vias 523 completely traverse the stacked structure 105, i.e., the cladding layer 106, the buried oxide layer 110, and the semiconductor substrate 114. The distance between most of the first conductive layers 521 and most of the second conductive layers 522 can be expressed as t3, which is similar to the height of the second vias 523. This distance t3 is generally applicable to those first conductive layers 521 and second conductive layers 522 interconnected by the second vias 523. However, the first conductive layer 521 that interconnects at least one first via 517 and the corresponding second via 523 may not be arranged on the second side 116 of the semiconductor substrate 114, i.e., it is not embedded in the stacked structure 105, but embedded in the cladding layer 106, while being spaced apart from the first side 111 of the buried oxide layer 110. Therefore, the distance between this conductive layer and the corresponding second layer is less than t3 (see the rightmost first conductive layer 521 in FIG. 5B). Such a first conductive layer 521 may be arranged at one end of the length of the inductor 520, which is closest to the photodetector device 102, i.e., closest to the photodetector device 102.

[0038] Referring to Figures 6A and 6B, a photodetector assembly 600 conforming to one embodiment is shown. This embodiment is similar to the embodiments of Figures 5A and 5B, except that this embodiment includes a signal electrode 103 and a ground electrode 104. For the sake of brevity, these similar features will not be described again. Therefore, the inductor 620, the first conductive layer 621, the second conductive layer 622, the first via 617, and the second via 623 in Figures 6A and 6B are respectively similar to the inductor 120, the first conductive layer 121, the second conductive layer 122, the first via 117, and the second via 123 in Figures 1A and 1B.

[0039] In the illustrated embodiment, the photodetector device 102 is embedded in the cladding layer and arranged on the first side of the buried oxide layer 110. In some other embodiments (not shown), the photodetector device 102 may be embedded in the buried oxide layer 110 and arranged on the first side 115 of the semiconductor substrate 114.

[0040] In some other embodiments (not shown), the first conductive layer and / or the second conductive layer may include one or more passivation layers. The passivation layers typically provide electrical isolation and can additionally protect the conductive layers from erosion and degradation.

[0041] In the illustrated embodiment, the inductor includes a first conductive layer and a second conductive layer. In some other embodiments (not shown), the inductor may additionally include multiple subsequent conductive layers, such as a third conductive layer arranged between the first conductive layer and the second conductive layer.

[0042] In some embodiments, the photodetector device operates in the visible light or optical communication band. For example, a photodetector device that can operate in the optical communication band is a germanium or silicon-based photodetector device, while a photodetector device that can operate in the visible light range is a silicon photodetector device. In some embodiments, the photodetector device can operate in the optical communication band in the range of 1260 nanometers to 1625 nanometers.

[0043] In some embodiments, the SOI structure may include a top silicon layer with a thickness ranging from 150 nm to 400 nm. The buried oxide layer may have a thickness ranging from 100 nm to 4000 nm. The overlay layer may include silicon dioxide or a passivation material with a thickness ranging from 1000 nm to 10000 nm. The first conductive layer and the second conductive layer may have the same or different thicknesses, and in some examples, may range from 100 nm to 3000 nm. The passivation layers, possibly on the first conductive layer and / or the second conductive layer, may each have a thickness ranging from 100 nm to 1000 nm. The dimensions of the signal and ground electrodes (e.g., electrical probe pads) may range from 10 μm to 1000 μm. The spacing of the electrical probe pads (e.g., center-to-center distance between pads) may range from 10 μm to 1000 μm. These dimensions are merely illustrative examples and are not limiting.

[0044] In the embodiments of Figures 1A, 1B, 2A, and 2B, the distance between the first conductive layer and the second conductive layer (denoted as t1) can range from 1 micrometer to 10 micrometers. In the embodiments of Figures 3A, 3B, 4A, and 4B, the distance between the first conductive layer and the second conductive layer (denoted as t2) can range from 2 micrometers to 20 micrometers. In the embodiments of Figures 5A, 5B, 6A, and 6B, the distance between the first conductive layer and the second conductive layer (denoted as t3) can range from 100 micrometers to 1000 micrometers. These dimensions are merely illustrative examples and not limiting.

[0045] By using a three-dimensional on-chip inductor, embodiments of high-speed photodetector assemblies can achieve a significantly reduced footprint while maintaining bandwidth performance compared to high-speed photodetector assemblies with conventional two-dimensional or planar inductors. Therefore, the reduced footprint of the high-speed photodetector assembly according to the embodiments is comparable to that of a normal photodetector assembly. A comparison of the footprints is described with reference to Figures 7 and 8.

[0046] Figure 7 is a schematic diagram of a conventional planar inductor 700. As shown in Figure 7, the planar inductor is a square inductor with multiple coil elements 702 arranged in a spiral pattern. The planar inductor 700 includes the following parameters: number of turns n, coil width w, coil width spacing s, outer diameter dou, inner diameter din, average diameter davg, and fill ratio ρ. Since the thickness of a conventional planar inductor has a very small effect on its inductance, it is not considered.

[0047] The modified Wheeler formula can be used to determine the inductance of a planar inductor, as follows: where K1 is a coefficient, for example, K1 = 2.34; K2 is a coefficient, for example, K2 = 2.75; µ0 is a coefficient, for example, µ0 = 4π x 10-7 H / m. Here, davg = 0.5(dout + din); ρ = (dout – din) / (dout + din).

[0048] In the example of the planar inductor 700 in Figure 7, the values ​​of the above parameters can be provided as follows: w = s = 10 micrometers; din = 40 micrometers; dout = 100 micrometers; n = 2; L = 0.378 Nahens. Based on the above parameter values, the occupied area of ​​the conventional planar inductor 700 in Figure 7 is defined as a spiral region with a diameter dout, which is 10,000 square micrometers.

[0049] Figure 8 is a schematic diagram of the three-dimensional inductors 120, 220, 320, 420, 520, and 620 used in the embodiments, such as Figures 1A to 6B. Inductors 120, 220, 320, 420, 520, and 620 include a first conductive layer, a second conductive layer, and second vias, wherein each second via interconnects one end of the first conductive layer and one end of the second conductive layer, the second conductive layer being spaced above a specific first conductive layer. Therefore, inductors 120, 220, 320, 420, 520, and 620 may have a coil-like arrangement, which may include a square, rectangular, or circular cross-sectional profile along a plane traversing the stacked structure (i.e., the cladding layer, the buried oxide layer, and the semiconductor substrate). The axis of the coil-like arrangement is parallel to or along the planar direction of the cladding layer 106, the buried oxide layer 110, and the semiconductor substrate 114. The three-dimensional inductor structure includes the following parameters: length l, width w, and height or depth t, where the planar dimensions of length l and width w define the area occupied by the inductor (see Figure 8).

[0050] Inductor 800, such as 120, 220, 320, 420, 520, 620, has an inductance that can be determined according to the Wheeler continuous inductance formula, as shown below: where n is the number of turns, for example n = 17; l is the length of the inductor, for example l = 70.7 micrometers; L is the inductance of the inductor, for example L = 0.378 Nahens, which is assumed to be the same as the planar inductor in Figure 7 for comparison purposes; x = 2(wt / π)0.5, for example x = 10 micrometers, which is a variable derived from t and w and is a tool for calculating w in reverse.

[0051] In the example of a three-dimensional inductor with a square cross-section, such as the embodiments of Figures 1A and 1B or 2A and 2B, if t1 = 2.4 micrometers, then according to the above parameter values, w = 32.7 micrometers. Therefore, the occupied area of ​​the inductor is 2312 square micrometers, which is 76.9% less than the occupied area of ​​the conventional planar inductor in Figure 7.

[0052] In another example of a three-dimensional inductor with a square cross-section, such as the embodiments of Figures 3A and 3B or 4A and 4B, if t2 = 5.4 micrometers, then according to the above parameter values, w = 14.5 micrometers. Therefore, the occupied area of ​​the inductor is 1028 square micrometers, which is 89.7% less than the occupied area of ​​the conventional planar inductor in Figure 7.

[0053] In another example of a three-dimensional inductor with a square cross-section, such as the embodiments in Figures 5A and 5B or 6A and 6B, if t3 = 730 micrometers, n = 2, l = 16 micrometers, x = 66.4 micrometers, w = 4.7 micrometers, and L = 0.378 Nahens, the inductor occupies an area of ​​75.2 square micrometers, which is 99.3% less than the area occupied by the conventional planar inductor in Figure 7.

[0054] In view of the above, the photodetector combination according to the embodiments of FIG5A and 5B or 6A and 6B achieves a maximum or improved reduction effect in the inductor area compared with the photodetector combination according to the embodiments of FIG1A and 1B, 2A and 2B, 3A and 3B, 4A and 4B or 5A and 5B.

[0055] Since the three-dimensional inductor is fabricated on a wafer, i.e., integrated with the photodetector device, the fabrication of the photodetector assembly with the three-dimensional inductor according to embodiments is compatible with complementary metal-oxide-semiconductor (CMOS) technologies, including but not limited to photolithography, ion implantation, etching, chemical vapor deposition, physical vapor deposition, rapid thermal annealing, and / or chemical mechanical polishing processes. This eliminates the need for off-wafer inductors, additional off-wafer processing, and associated coupling between the off-wafer inductor and the photodetector device.

[0056] It should be understood that the embodiments and features described above should be considered exemplary and not restrictive. Many other embodiments will be apparent to those skilled in the art from consideration of the specifications and practice of the invention. Furthermore, certain terms are used for clarity of description and not for limiting the embodiments disclosed in the invention. [Simplified Explanation of the Diagram]

[0057] FIG1A shows a top-through-view of a high-speed optical detector assembly according to an embodiment. FIG1B shows a cross-sectional view along arrows 1B-1B in FIG1A. FIG2A shows a top-through-view of a high-speed optical detector assembly according to an embodiment. FIG2B shows a cross-sectional view along arrows 2B-2B in FIG2A. FIG3A shows a top-through-view of a high-speed optical detector assembly according to an embodiment. FIG3B shows a cross-sectional view along arrows 3B-3B in FIG3A. FIG4A shows a top-through-view of a high-speed optical detector assembly according to an embodiment. FIG4B shows a cross-sectional view along arrows 4B-4B in FIG4A. FIG5A shows a top-through-view of a high-speed optical detector assembly according to an embodiment. FIG5B shows a cross-sectional view along arrows 5B-5B in FIG5A. FIG6A shows a top-through-view of a high-speed optical detector assembly according to an embodiment. FIG6B shows a cross-sectional view along arrows 6B-6B in FIG6A. Figure 7 illustrates a conventional planar inductor. Figure 8 shows a top-through view of a three-dimensional inductor conforming to at least some embodiments. It should be understood that the figures are not necessarily drawn to scale and thus present slightly simplified representations of the various features illustrating the characteristics of this disclosure. Specific design features of the photodetector assemblies disclosed herein (including, for example, the specific dimensions of the inductor, embedded oxide layer, and electrodes) will be determined in part by the specific intended application and usage environment. Some features of the illustrated embodiments are enlarged or distorted relative to other features to aid in providing a clear understanding. Specifically, for example, thin features may be thickened for clarity of illustration. Unless otherwise stated, all references to orientation and position refer to the orientations shown in the figures.

Claims

1. A photodetector assembly, comprising: A stacked structure having a cladding layer, a buried oxide layer, and a semiconductor substrate, wherein the cladding layer includes a first side and an opposite second side, the second side being adjacent to the first side of the buried oxide layer, wherein the semiconductor substrate includes a first side and an opposite second side, the first side being adjacent to the opposite second side of the buried oxide layer; a photodetector device embedded in the stacked structure; and an inductor operatively coupled to the photodetector device, wherein the inductor is arranged on the first side of the cladding layer and at least partially traverses the stacked structure. The signal electrode is operatively coupled to the photodetector device using the inductor. And at least one ground electrode, operatively coupled to the photodetector device, wherein the signal electrode and the ground electrode are arranged on the first side of the cladding layer.

2. The photodetector assembly as claimed in claim 1, wherein the inductor comprises: Multiple first conductive layers are embedded in the stacked structure; Multiple second conductive layers are arranged on the first side of the coating layer; And multiple vias that pass through the stacked structure and interconnect the first conductive layer and the second conductive layer respectively.

3. The photodetector assembly as claimed in claim 2, wherein the first conductive layer is embedded in the cladding layer and arranged on the first side of the embedded oxide layer, wherein the vias at least partially penetrate the cladding layer.

4. The photodetector assembly as claimed in claim 3, wherein the height of the second aperture in the aperture that passes through the cladding layer and does not overlap with the photodetector device is between 1 micrometer and 10 micrometers.

5. The photodetector assembly as claimed in claim 2, wherein the first conductive layer is embedded in the embedded oxide layer, and wherein the via completely penetrates the cladding layer and at least partially penetrates the embedded oxide layer.

6. The photodetector assembly as claimed in claim 5, wherein the height of the second aperture in the aperture that completely penetrates the cladding layer and at least partially penetrates the embedded oxide layer is between 2 micrometers and 20 micrometers.

7. The photodetector assembly as claimed in claim 2, wherein the first conductive layer is arranged on the second side of the semiconductor substrate, and wherein the via completely penetrates the cladding layer, the buried oxide layer, and the semiconductor substrate.

8. The photodetector assembly as claimed in claim 7, wherein the height of the second via that completely penetrates the cladding layer, the buried oxide layer, and the semiconductor substrate is between 100 micrometers and 1000 micrometers.

9. The photodetector assembly of any one of claims 1 to 8, wherein the inductor comprises a coil arrangement, wherein the axis of the coil arrangement is parallel to the planar direction of the cladding layer, the buried oxide layer and the semiconductor substrate.

10. The photodetector assembly as claimed in claim 9, wherein the coil arrangement comprises a square or rectangular cross-sectional profile along a plane passing through the cladding layer, the embedded oxide layer, and the semiconductor substrate.

11. The photodetector assembly as claimed in claim 1, wherein the photodetector devices are embedded in the cladding layer or arranged on the first side of the semiconductor substrate.

12. The photodetector assembly as claimed in claim 1, wherein the at least one ground electrode comprises two or more ground electrodes arranged on the first side of the cladding layer and operatively coupled to the photodetector device.

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