Semiconductor package including memory dies

Abstract

A semiconductor package includes first data memory dies configured to share a first control bus and a first data bus, the first data memory dies belonging to different ranks, a first error correction memory die configured to share the first control bus with the first data memory dies and connected to a first error correction bus, second data memory dies configured to share a second control bus and a second data bus, second data memory dies belonging to different ranks, and a second error correction memory die configured to share the second control bus with the second data memory dies and connected to the second error correction bus.

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