Cache level selection

Abstract

An apparatus comprises cache control circuitry to allocate, to a cache hierarchy comprising a plurality of levels of cache, one or more materialised cache lines corresponding to a region of address space indicated by software-provided information, each materialised cache line specifying a predetermined value as cached data; and cache level selection circuitry to select, based on a size of the region of address space indicated by the software-provided information, at least one target level of the plurality of levels of cache to which the one or more materialised cache lines are to be allocated.

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