Memory module and compute express link (CXL) device

Abstract

A memory module includes a memory device that includes a memory cell array including a fault block in which a fault cell is included and a remap block for replacing the fault block, and a controller that communicates with a host device through a compute express link (CXL) interface and to control the memory device. The controller may redundantly store recovery information including a fault flag and a remap address corresponding to the remap block in the memory device, may read data corresponding to a target address from the memory device, based on receiving a first request, may identify whether the target address is the fault address, based on the data corresponding to the target address, and may generate a second request including the remap address based on the data corresponding to the target address, when it is determined that the target address is the fault address.

Images