Circuit configuration device and method

TW202632525APending Publication Date: 2026-08-01ASUSTEK COMPUTER INC
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Patent Information

Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
ASUSTEK COMPUTER INC
Filing Date
2025-01-22
Publication Date
2026-08-01

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    Figure TWG2TA001069771_003
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Abstract

A circuit configuration device and a circuit configuration method are provided. The method is applicable to a buck circuit and comprising the following steps: evaluating an inductance range suitable for the buck circuit according to a design specification of the buck circuit; testing a plurality of efficiency curves respectively corresponding to a plurality of inductance values within the inductance range according to the design specification and the inductance range; analyzing the efficiency curves to obtain one or more efficiency curve intersection points; planning an inductor region to be configured on the buck circuit based on the inductance range and the efficiency curve intersection point. The inductor region comprises one or more inductor groups. Each inductor group is formed by packaging a plurality of inductor elements connected in series. The circuit inductance formed by the inductor region varies with a state of the buck circuit.
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