Staged gate voltage control

TW202632632APending Publication Date: 2026-08-01E INK CORP
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Patent Information

Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
E INK CORP
Filing Date
2024-10-04
Publication Date
2026-08-01

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Abstract

An electro-optic display and driving method are disclosed. The electro-optic display includes a layer of electrophoretic material disposed between a common electrode and a backplane. The backplane includes an array of pixel electrodes, each coupled to a pixel transistor. A controller provides time-dependent voltages to the gate line, the source line, and the common electrode of each pixel transistor. The driving method includes applying a first stage voltage to the gate line. The first stage voltage has a first magnitude that is substantially half of a gate low voltage for placing the pixel transistor in a non-conducting state. The first stage voltage is maintained on the gate line for a first period of time. Then, a second stage voltage is applied to the gate line, where the second stage voltage has a second magnitude that is substantially the gate low voltage for placing the pixel transistor in the non-conducting state.
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