Semiconductor devices

Abstract

According to an embodiment, the semiconductor device of the present invention includes a memory circuit, a first FIFO, a second FIFO, and an input / output circuit. The memory circuit outputs data. The first FIFO receives data from the memory circuit and outputs data synchronously with a first clock signal. The second FIFO receives data output from the first FIFO and outputs data synchronously with the first clock signal. The input / output circuit outputs data from the second FIFO. The second FIFO is configured closer to the input / output circuit than the first FIFO.

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