Bit cell including read port and write port

Abstract

A bit cell including a read port and a write port, comprises a plurality of active regions spaced apart from each other in parallel in a first direction and extending in a second direction perpendicular to the first direction; and a plurality of gates spaced apart from each other in parallel in the second direction, extending in the first direction, and arranged in at least one of the plurality of active regions to each form a transistor. The read port includes a read pass transistor and a read pull-down transistor. The write port includes a first pass transistor, a second pass transistor, a first pull-down transistor, a second pull-down transistor, a first pull-up transistor, and a second pull-up transistor. The read pass transistor, the read pull-down transistor, the first pass transistor, and the first pull-down transistor share one active region.

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