Semiconductor memory devices and data storage methods for semiconductor memory devices

Abstract

This invention provides a semiconductor memory device with a shorter data storage time and a data storage method for the semiconductor memory device. The semiconductor memory device includes circuitry that shifts the threshold voltage of each of the second plurality of memory cells within a first plurality of memory cells by the same amount. Then, the circuitry determines which of two or more voltage ranges, separated by one or more read levels, the threshold voltage of each of the second plurality of memory cells falls into. For the third plurality of memory cells within the second plurality of memory cells, the circuitry groups memory cells that share the threshold voltage range of the two or more voltage ranges into groups, and for each group, performs an operation of selecting one plurality of memory cells contained in one group and applying a programming pulse to the first word line that corresponds to the voltage range of the group.

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