memory devices

Abstract

The purpose of this invention is to improve the performance of memory devices. A memory device according to an embodiment includes a first bit line, a first select transistor, a second bit line, a serial line, a word line, a sense amplifier, and a driving circuit. One end of the first select transistor is connected to the first bit line. The second bit line is connected to the other end of the first select transistor. The serial line includes a second select transistor connected to the second bit line and a memory cell transistor. The word line is connected to the memory cell transistor. The sense amplifier is connected to the first bit line. The driving circuit is connected to either the first bit line or the second bit line. During a write operation, when the memory cell transistor is set to be unprogrammable, the sense amplifier applies a first voltage to the first bit line, and the driving circuit applies a second voltage higher than the first voltage to the second bit line.

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