Memory system, memory device, and method for controlling memory device

Abstract

This invention suppresses the decline in reliability of memory systems and improves operating speed. One embodiment of the memory system includes a memory device and a memory controller. The memory device comprises a plurality of memory cells, and the memory controller is configured to cause the memory device to perform a plurality of read operations using a plurality of read levels set at equal intervals during a tracking operation. Using the number of active cells in each of the plurality of read operations based on the plurality of read levels set at equal intervals, a plurality of first-bit counts are calculated. Using the plurality of first-bit counts, second-bit counts and third-bit counts corresponding to a fourth voltage range and a fifth voltage range, each containing a third voltage range and having distinct voltage widths, are calculated.

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