Semiconductor wafer processing with temperature control and bias powered process ring for extreme edge control

Abstract

Examples described herein generally related to a process kit for a semiconductor processing chamber. In one example, the process kit includes an edge ring having an inner diameter, a bottom surface and a top surface. The edge ring is configured to circumscribe a substrate in a semiconductor processing chamber. The process kit includes a insert ring positioned beneath the edge ring. The insert ring has an upper surface configured to contact the bottom surface of the edge ring. The insert ring has a body having a lower surface, an electrode disposed in the body, and a pin extending into the body through the lower surface coupled to the electrode. A conductive pin of the pin protrudes from the lower surface and is configured to couple to a power supply for the electrode.

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