Voltage-controlled oscillation device

Abstract

A voltage-controlled oscillator includes an oscillator circuit capable of outputting oscillation signals from first and second output terminals, an interleaved coupling circuit, and an auxiliary potential adjustment circuit. The interleaved coupling circuit includes first and second interleaved coupled transistors. The drain of the first interleaved coupled transistor is electrically connected to the first output terminal, and its gate is electrically connected to the second output terminal. The drain of the second interleaved coupled transistor is electrically connected to the second output terminal, and its gate is electrically connected to the first output terminal. The auxiliary potential adjustment circuit includes first and second source followers. The first source follower receives the oscillation signal and is electrically connected to the base of the first interleaved coupled transistor. The second source follower receives the oscillation signal and is electrically connected to the base of the second interleaved coupled transistor. Using this design, the critical voltage of the transistor can be dynamically adjusted, thereby increasing the transistor's turn-on speed.

Description

[Technical Field]

[0001] This invention relates to an oscillator, and more particularly to a voltage-controlled oscillator device. [Previous Technology]

[0002] Voltage-controlled oscillators (VCOs) are widely used in various communication radio frequency systems due to their low phase noise advantage. Therefore, optimizing current VCOs, such as improving their turn-on speed and / or reducing phase noise, is one of the main research and development goals of those in this field. [Summary of the Invention]

[0003] Therefore, the object of the present invention is to provide a voltage-controlled oscillation device that can overcome at least one disadvantage of the prior art.

[0004] Therefore, the voltage-controlled oscillation device of the present invention includes an oscillator circuit, an interleaved coupling circuit, and an auxiliary potential adjustment circuit.

[0005] The oscillator circuit includes an input terminal for receiving an input voltage, a first output terminal, and a second output terminal. When the oscillator circuit receives the input voltage, it outputs a pair of oscillation signals from the first output terminal and the second output terminal.

[0006] The interleaved coupling circuit includes a first interleaved coupling transistor and a second interleaved coupling transistor. The first interleaved coupling transistor includes a drain electrically connected to the first output terminal, a gate electrically connected to the second output terminal, and a base. The second interleaved coupling transistor includes a drain electrically connected to the second output terminal, a gate electrically connected to the first output terminal, and a base.

[0007] The auxiliary potential adjustment circuit includes a first source follower and a second source follower. The first source follower receives the oscillation signal and includes a first follower output terminal electrically connected to the base of the first interleaved transistor, to adjust the potential of the base of the first interleaved transistor according to the oscillation signal. The second source follower receives the oscillation signal and includes a second follower output terminal electrically connected to the base of the second interleaved transistor, to adjust the potential of the base of the second interleaved transistor according to the oscillation signal.

[0008] The advantage of this invention lies in the fact that, by utilizing the design of the auxiliary potential adjustment circuit, the base potentials of the first interleaved transistor and the second interleaved transistor in the interleaved coupling circuit can be adjusted using the oscillation signal, thereby dynamically adjusting the critical voltages of the first interleaved transistor and the second interleaved transistor. This improves the transistor turn-on speed of the voltage-controlled oscillator and increases the signal processing speed.

Implementation Method

[0009] Before describing the present invention in detail, it should be noted that in this disclosure, when two elements are described as "connected in series," "connected in series," or similar terms, it is intended only to indicate a series connection between the two elements, and does not necessarily imply that the current flowing through the two elements needs to be the same, nor does it limit whether there is an additional element coupled to the common junction between the two elements. The terms "connected in series," "coupled in series," or similar terms used in this invention should be interpreted as referring to the situation when these elements are viewed individually.

[0010] Referring to Figure 1, one embodiment of the voltage-controlled oscillation device of the present invention includes an oscillator circuit 1, an interleaved coupling circuit 2, and an auxiliary potential adjustment circuit 3.

[0011] The oscillator circuit 1 includes an input terminal 11 for receiving an input voltage Vdd, a first output terminal 12, and a second output terminal 13. The oscillator circuit 1 also includes an inductor module 14 electrically connected to the first output terminal 12 and the second output terminal 13, and a capacitor module 15 electrically connected to the first output terminal 12 and the second output terminal 13.

[0012] The inductor module 14 includes a first inductor 141 and a second inductor 142 connected in series between the first output terminal 12 and the second output terminal 13. The capacitor module 15 includes a first capacitor 151 and a second capacitor 152 connected in series between the first output terminal 12 and the second output terminal 13. The input terminal 11 is electrically connected to the common node of the first inductor 141 and the second inductor 142. Therefore, when the oscillator circuit 1 receives the input voltage Vdd, it outputs a pair of oscillation signals from the first output terminal 12 and the second output terminal 13.

[0013] In some embodiments, the capacitor module 15 may include a capacitor electrically connected between the first output terminal 12 and the second output terminal 13. In some embodiments, the capacitor module 15 may include more than two capacitors connected in series between the first output terminal 12 and the second output terminal 13. In some embodiments, the capacitor module 15 may include two or more capacitors connected in series / parallel between the first output terminal 12 and the second output terminal 13.

[0014] In some embodiments, the inductor module 14 may include more than two inductors connected in series between the first output terminal 12 and the second output terminal 13, and the input terminal 11 is electrically connected to a common node of two of the adjacent electrically connected inductors.

[0015] The interleaved coupling circuit 2 is electrically connected to the first output terminal 12 and the second output terminal 13 of the oscillator circuit 1, and includes a first interleaved coupling transistor 21 and a second interleaved coupling transistor 22.

[0016] The first interleaved transistor 21 is an n-type transistor, specifically an n-type metal-oxide-semiconductor field-effect transistor (NMOSFET), and includes a drain electrically connected to the first output terminal 12, a gate electrically connected to the second output terminal 13, a source electrically connected to a reference potential, and a base. The reference potential can be ground, another voltage supply source, or include circuitry that can provide power.

[0017] The second interleaved transistor 22 is an n-type transistor, specifically an NMOS field-effect transistor, and includes a drain electrically connected to the second output terminal 13, a gate electrically connected to the first output terminal 12, a source electrically connected to the reference potential, and a base.

[0018] The auxiliary potential adjustment circuit 3 is electrically connected to the interleaved coupling circuit 2 and includes a first source follower 31, a second source follower 32, a first load 33 electrically connected to the first source follower 31, and a second load 34 electrically connected to the second source follower 32.

[0019] The first source follower 31 can receive the oscillation signal and includes a first follower output terminal 311 electrically connected to the base of the first interleaved crystal 21, and a first potential adjustment crystal 312. The first potential adjustment crystal 312 can be an n-type crystal, specifically an NMOS field-effect crystal. In this embodiment, the first potential adjustment crystal 312 includes a drain electrically connected to the first output terminal 12, a source electrically connected to the base of the first interleaved crystal 21, and a gate electrically connected to the second output terminal 13. The source of the first potential adjustment crystal 312 serves as the first follower output terminal 311 of the first source follower 31.

[0020] The second source follower 32 can receive the oscillation signal and includes a second follower output terminal 321 electrically connected to the base of the second interleaved crystal 22, and a second potential adjustment crystal 322. The second potential adjustment crystal 322 can be an n-type crystal, specifically an NMOS field-effect crystal. In this embodiment, the second potential adjustment crystal 322 includes a drain electrically connected to the second output terminal 13, a source electrically connected to the second base of the second interleaved crystal 22, and a gate electrically connected to the first output terminal 12. The source of the second potential adjustment crystal 322 serves as the second follower output terminal 321 of the second source follower 32.

[0021] The first load 33 may include a resistor, one end of which is electrically connected to the source of the first potential adjustment transistor 312, and the other end of which is electrically connected to the reference potential, such that the source of the first potential adjustment transistor 312 is electrically connected to the reference potential via the first load 33. The second load 34 may include a resistor, one end of which is electrically connected to the source of the second potential adjustment transistor 322, and the other end of which is electrically connected to the reference potential, such that the source of the second potential adjustment transistor 322 is electrically connected to the reference potential via the second load 34.

[0022] By using the design that the drain of the first potential adjustment transistor 312 is electrically connected to the first output terminal 12, the gate of the first potential adjustment transistor 312 is electrically connected to the second output terminal 13, and the source of the first potential adjustment transistor 312 (that is, the first follower output terminal 311 of the first source follower 31) is electrically connected to the base of the first interleaved transistor 21, the potential of the base of the first interleaved transistor 21 can be dynamically adjusted through the oscillation signal. By using the design that the drain of the second potential-adjusting transistor 322 is electrically connected to the second output terminal 13, the gate of the second potential-adjusting transistor 322 is electrically connected to the first output terminal 12, and the source of the second potential-adjusting transistor 322 (that is, the second follower output terminal 321 of the second source follower 32) is electrically connected to the base of the second interleaved transistor 22, the base potential of the second interleaved transistor 22 can be dynamically adjusted through the oscillation signal.

[0023] The aspect ratio (W / L) of the channel of the first interleaved transistor 21 may be greater than the aspect ratio (W / L) of the channel of the first potential adjustment transistor 312, and the aspect ratio (W / L) of the channel of the second interleaved transistor 22 may be greater than the aspect ratio (W / L) of the channel of the second potential adjustment transistor 322. In this embodiment, the ratio of the aspect ratio (W / L) of the channel of the first interleaved transistor 21 to the aspect ratio (W / L) of the channel of the first potential adjustment transistor 312 is 5:1. The ratio of the aspect ratio (W / L) of the channel of the second interleaved transistor 22 to the aspect ratio (W / L) of the channel of the second potential adjustment transistor 322 is 5:1.

[0024] In some embodiments, the signal potentials of the first source follower 31 and the second source follower 32 can be adjusted by adjusting the resistance values ​​of the first load 33 and the second load 34, thereby adjusting the voltage difference between the source and base of the first interleaved transistor 21 of the interleaved coupling circuit 2, and thus adjusting the value of the threshold voltage (Vth).

[0025] The input voltage Vdd is a positive bias voltage. When the voltage-controlled oscillator is activated, the positive bias voltage is input to the oscillator circuit 1 from the input terminal 11, and one of the oscillation signals is output from the first output terminal 12 and the second output terminal 13 respectively.

[0026] One of the oscillation signals is transmitted to the drain of the first interleaved crystal 21, the drain of the first potential adjustment crystal 312, the gate of the second interleaved crystal 22, and the gate of the second potential adjustment crystal 322. Since the ideal gain of the first potential adjustment crystal 312 is 1, the first follower output terminal 311 of the first source follower 31 (that is, the source of the first potential adjustment crystal 312) generates a first potential adjustment signal that is almost identical to the gate of the first potential adjustment crystal 312, and uses the first potential adjustment signal as the potential of the base of the first interleaved crystal 21. In this way, a small positive feedback can be created for the base of the first interleaved crystal 21 (that is, the body pin of the first interleaved crystal 21). Therefore, the threshold voltage (Vth) of the first interleaved transistor 21 can be dynamically adjusted, and the characteristic that the threshold voltage of the first interleaved transistor 21 decreases when the potential of the first base relative to the reference potential (e.g., ground) increases. When the threshold voltage of the first interleaved transistor 21 is relatively low, the first interleaved transistor 21 can start conducting more quickly, thereby increasing the turn-on and turn-off speed and thus improving the conduction speed of the first interleaved transistor 21.

[0027] Similarly, the other of the oscillation signal is transmitted to the drain of the second interleaved crystal 22, the drain of the second potential adjustment crystal 322, the gate of the first interleaved crystal 21, and the gate of the first potential adjustment crystal 312. Since the ideal gain of the first potential adjustment crystal 312 is 1, the second follower output 321 of the second source follower 32 (that is, the source of the second potential adjustment crystal 322) generates a second potential adjustment signal that is almost identical to the gate of the second potential adjustment crystal 322, and uses this second potential adjustment signal as the potential of the base of the second interleaved crystal 22. This creates a small positive feedback for the base of the second interleaved crystal 22 (that is, the body pin of the second interleaved crystal 22). Therefore, the threshold voltage (Vth) of the second interleaved transistor 22 can be dynamically adjusted. Utilizing the characteristic that a rise in the base potential relative to ground lowers the threshold voltage of the second interleaved transistor 22, the second interleaved transistor 22 can begin conducting more quickly, thereby increasing its conduction speed. In this embodiment, the phase of the gate signal of the first interleaved transistor 21 is the same as the phase of the base signal, and the phase of the gate signal of the second interleaved transistor 22 is the same as the phase of the base signal. Furthermore, the potential difference between the source potential and the base of the first interleaved transistor 21 can be controlled to be less than 0 (Vsb < 0); the potential difference between the source potential and the base of the second interleaved transistor 22 can be controlled to be less than 0 (Vsb < 0), thus maintaining a relatively smaller threshold voltage. Furthermore, the faster conduction speed increases the power of the components. According to the Leeson model, power and phase noise are negatively correlated, which can also improve the phase noise of the voltage-controlled oscillator.

[0028] In summary, the voltage-controlled oscillator of the present invention utilizes the design of the first source follower 31 and the second source follower 32 in the auxiliary potential adjustment circuit 3 to dynamically adjust the base potential of the first interleaved transistor 21 and the base potential of the second interleaved transistor 22, thereby increasing the conduction speed of the first interleaved transistor 21 and the second interleaved transistor 22, and thus improving the signal processing speed and reducing phase noise. Therefore, the objective of the present invention is indeed achieved.

[0029] However, the above description is only an embodiment of the present invention and should not be construed as limiting the scope of the present invention. Any simple equivalent changes and modifications made in accordance with the scope of the patent application and the contents of the patent specification shall still fall within the scope of the patent of the present invention. [Simplified Explanation of the Diagram]

[0030] Other features and effects of the present invention will be clearly presented in the embodiments with reference to the drawings, wherein: Figure 1 is a circuit diagram illustrating an embodiment of the voltage-controlled oscillator of the present invention.

Claims

1. A voltage-controlled oscillator device, comprising: an oscillator circuit including an input terminal for receiving an input voltage, a first output terminal, and a second output terminal, wherein when the input voltage is received, the oscillator circuit outputs a pair of oscillation signals from the first output terminal and the second output terminal; An interleaved coupling circuit includes a first interleaved transistor, comprising a drain electrically connected to a first output terminal, a gate electrically connected to a second output terminal, and a base; a second interleaved transistor, comprising a drain electrically connected to the second output terminal, a gate electrically connected to the first output terminal, and a base; and an auxiliary potential adjustment circuit, comprising a first source follower receiving the oscillation signal and including a first follower output terminal electrically connected to the base of the first interleaved transistor to adjust the potential of the base of the first interleaved transistor according to the oscillation signal; and a second source follower receiving the oscillation signal and including a second follower output terminal electrically connected to the base of the second interleaved transistor to adjust the potential of the base of the second interleaved transistor according to the oscillation signal, wherein... The first source follower includes a first potential-adjustable transistor having a source electrically connected to the base of the first interleaved transistor. The second source follower includes a second potential-adjustable transistor having a source electrically connected to the base of the second interleaved transistor. The aspect ratio of the channel of the first interleaved transistor is greater than that of the channel of the first potential-adjustable transistor, and the aspect ratio of the channel of the second interleaved transistor is also greater than that of the channel of the second potential-adjustable transistor.

2. The voltage-controlled oscillator as described in claim 1, wherein, The first potential adjustment transistor also includes a gate electrically connected to the second output terminal, and the second potential adjustment transistor also includes a gate electrically connected to the first output terminal.

3. The voltage-controlled oscillator as described in claim 2, wherein, The input voltage is a positive bias voltage, and the first interleaved transistor, the second interleaved transistor, the first potential adjustment transistor, and the second potential adjustment transistor are all n-type transistors.

4. The voltage-controlled oscillation device as described in claim 3, wherein, The auxiliary potential adjustment circuit further includes a first load for electrically connecting the source of the first potential adjustment transistor to a reference potential, and a second load for electrically connecting the source of the second potential adjustment transistor to the reference potential.

5. The voltage-controlled oscillator as described in claim 4, wherein, The first interleaved transistor also includes a source electrically connected to the reference potential, and the second interleaved transistor also includes a source electrically connected to the reference potential.

6. The voltage-controlled oscillator as claimed in claim 1, wherein, The oscillator circuit also includes an inductor module electrically connected between the first output terminal and the second output terminal, and a capacitor module electrically connected between the first output terminal and the second output terminal.

7. The voltage-controlled oscillator as described in claim 6, wherein, The inductor module includes a first inductor and a second inductor connected in series between the first output terminal and the second output terminal, and the capacitor module of the resonant circuit includes a first capacitor and a second capacitor connected in series between the first output terminal and the second output terminal.

8. The voltage-controlled oscillator as described in claim 7, wherein, The input terminal of the oscillator circuit is electrically connected to the common node of the first inductor and the second inductor.

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