Circuit board and manufacturing method thereof

TW202633034AActive Publication Date: 2026-08-01HONGQISHENG PRECISION ELECTRONICS (QINHUANGDAO) CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
HONGQISHENG PRECISION ELECTRONICS (QINHUANGDAO) CO LTD
Filing Date
2025-01-22
Publication Date
2026-08-01

AI Technical Summary

Technical Problem

High-frequency and high-speed circuit boards experience transmission loss due to dielectric loss and the thickness of the dielectric layer affects signal transmission speed, necessitating improved dielectric layer management.

Method used

A circuit board design with an adjustable dielectric layer thickness using electromagnetic drive methods to control the thickness and morphology of the dielectric layer, specifically employing air as the dielectric medium, through magnetic fields to adjust cavity thickness and shape.

Benefits of technology

Enhances transmission performance by optimizing impedance matching, reducing loss, controlling phase delay, supporting wideband operation, and providing flexibility and reduced size/weight, particularly beneficial for high-frequency and high-speed applications.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure TWG2TA001069776_001
    Figure TWG2TA001069776_001
  • Figure TWG2TA001069776_002
    Figure TWG2TA001069776_002
  • Figure TWG2TA001069776_003
    Figure TWG2TA001069776_003
Patent Text Reader

Abstract

A circuit board includes a first exterior structure, a second exterior structure, and an interior structure disposed between the first exterior structure and the exterior external structure. A first inner circuit layer of the interior structure includes a first coil circuit located in a first peripheral region, in which the first coil circuit is electrically connected to the first exterior structure. A stretchable conductive layer of the interior structure is disposed between the first exterior structure and the second exterior structure, and includes two central metal units located in a central region, in which the two central metal units are separated from each other. A second inner circuit layer of the interior structure includes a second coil circuit located in the first peripheral region, in which the second coil circuit is electrically connected to the second exterior structure, and the first coil circuit is disposed relative to the second coil circuit.
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] This invention relates to a circuit board and a method for manufacturing a circuit board, and more particularly to a circuit board having a stretchable conductive layer and a method for manufacturing the same. [Previous Technology]

[0002] With the development of 5G (5th Generation Wireless Systems) technology, the demand for high-frequency and high-speed circuit boards is increasing. Electrical signals typically experience transmission loss during circuit transmission. Dielectric loss is one of the causes of transmission loss. Dielectric loss refers to the heat loss generated when an electric field passes through a dielectric due to the alternating polarization of dielectric molecules and continuous collisions of the crystal lattice. Furthermore, the thickness of the dielectric layer also affects the speed of electrical signal transmission. [Summary of the Invention]

[0003] The circuit board provided by the present invention employs an electromagnetic drive method to freely adjust the thickness and morphology of the dielectric layer (e.g., air), thereby improving the transmission performance of the high-frequency and high-speed circuit board. The thickness of the air dielectric at different locations can be adjusted by controlling the direction and magnitude of the magnetic field, thereby forming a special shape to facilitate subsequent assembly.

[0004] At least one embodiment of the present invention provides a circuit board having a central region and a first outer region adjacent to the central region. The circuit board includes a first outer structure, a second outer structure, and an internal structure. The internal structure is disposed between the first outer structure and the second outer structure. The internal structure includes an inner insulating layer, a first internal circuit layer, a stretchable conductive layer, and a second internal circuit layer. The first internal circuit layer is disposed between the inner insulating layer and the first outer structure and includes a first coil loop located in the first outer region, wherein the first coil loop is electrically connected to the first outer structure. The stretchable conductive layer is disposed between the first outer structure and the second outer structure and includes two central metal units located in the central region and a first outer metal unit located in the first outer region, wherein the two central metal units are separated from each other. The second internal circuit layer is disposed on the second outer structure and includes a transmission line located in the central region and a second coil loop located in the first outer region, wherein the second coil loop is electrically connected to the second outer structure, and the first coil loop is disposed relative to the second coil loop.

[0005] A method for manufacturing a circuit board according to at least one embodiment of the present invention includes the following steps: providing a first original external substrate and a second original external substrate, wherein the first original external substrate and the second original external substrate each have a corresponding central region and a first outer region adjacent to the central region, wherein the first original external substrate includes an internal insulating layer and a first original metal layer disposed on the internal insulating layer; forming a second internal circuit layer on the second original external substrate, wherein the second internal circuit layer includes a transmission line located in the central region and a second coil circuit located in the first outer region; forming a stretchable conductive layer on the second original external substrate; forming a first original external substrate on the stretchable conductive layer; forming the first original metal layer into a first internal circuit layer, wherein the first internal circuit layer includes a first coil circuit located in the first outer region, the first coil circuit being disposed relative to the second coil circuit; and forming a first external structure on the first internal circuit layer, wherein the first coil circuit is electrically connected to the first external structure.

Implementation Method

[0007] It will be understood that although terms such as "first," "second," etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of the embodiments, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0008] According to signal transmission theory, the speed of electrical signal propagation is inversely proportional to the square root of the dielectric constant of the medium. Therefore, the lower the dielectric constant of the medium, the faster the electrical signal propagation speed.

[0009] FIG1 is a schematic cross-sectional view of a stripline 100 according to an embodiment of the present invention. The stripline 100 includes a ground layer 110, a ground layer 120, a dielectric layer 130, and a transmission line 140. The dielectric layer 130 is disposed between the ground layer 110 and the ground layer 120, and the transmission line 140 is disposed in the dielectric layer 130. In the embodiment of FIG1, the dielectric layer 130 has a thickness b, and the dielectric layer 130 is air; therefore, the dielectric layer 130 can also be understood as a cavity. The relative permittivity (εr) of air is 1.000585.

[0010] Please refer to Figure 1 and Table 1. The present invention simulates dielectric layers 130 of different thicknesses and observes their characteristic impedance. As can be seen from the results in Table 1, the thicker the air dielectric (i.e., dielectric layer 130) is, the higher the characteristic impedance Z0 of the air dielectric will be.

[0011] Table 1 The width W of the transmission line The thickness t of the transmission line The thickness b of the air medium Characteristic impedance Z0 0.02mm 12µm 0.05mm 74.57Ω 0.02mm 12µm 0.06mm 85.18Ω 0.02mm 12µm 0.10mm 115.24Ω

[0012] In detail, the transmission line 140 generates an electromagnetic field around it when transmitting signals. When a cavity structure exists, different cavity thicknesses will change the distribution of the electromagnetic field and the boundary conditions. A thicker cavity may cause changes in the reflection or scattering of the electromagnetic field, thereby affecting signal transmission and leading to changes in signal loss.

[0013] FIG2A is a schematic cross-sectional view of a circuit board 200 according to some embodiments of the present invention. The circuit board 200 has a central region CR and a first outer region PR1 adjacent to the central region CR. The circuit board 200 includes a first outer structure 210, a second outer structure 220, and an inner structure 230. The inner structure 230 is disposed between the first outer structure 210 and the second outer structure 220. The inner structure 230 includes an inner insulating layer 232, a first inner circuit layer 234, a stretchable conductive layer 236, and a second inner circuit layer 238.

[0014] As shown in Figure 2A, the first external structure 210 includes an external insulating layer 212 and a wiring layer 214. The second external structure 220 includes an external insulating layer 222 and a wiring layer 224. A first internal wiring layer 234 of the internal structure 230 is disposed between the internal insulating layer 232 and the first external structure 210. Specifically, the first internal wiring layer 234 is disposed between the internal insulating layer 232 and the external insulating layer 212. The first internal wiring layer 234 includes a first coil loop C1 located in the first outer region PR1, wherein the first coil loop C1 is electrically connected to the first external structure 210. Specifically, the first coil loop C1 is electrically connected to the wiring layer 214. The first internal wiring layer 234 also includes a ground layer GND1 located in the central region CR, wherein the ground layer GND1 is not electrically connected to the first coil loop C1.

[0015] Figure 2B is a top view of the first coil circuit C1 in Figure 2A. It can be understood that the first coil circuit C1 in Figure 2A has a cross-sectional view along the section line A-A' of the first coil circuit C1 in Figure 2B. It should be noted that, for the sake of simplification, the number of turns of the first coil circuit C1 is not limited to those shown in the figure.

[0016] Referring to Figure 2A, the second internal wiring layer 238 of the internal structure 230 is disposed on the second external structure 220. Specifically, the second internal wiring layer 238 is disposed on the external insulating layer 222. The second internal wiring layer 238 includes a transmission line TL located in the central region CR and a second coil loop C2 located in the first outer region PR1, wherein the second coil loop C2 is electrically connected to the second external structure 220, and a first coil loop C1 is disposed relative to the second coil loop C2. Specifically, the second coil loop C2 is electrically connected to the wiring layer 224. The transmission line TL is not electrically connected to the first coil loop C1. The wiring layer 224 also includes a ground layer GND2 located in the central region CR, wherein the ground layer GND2 is not electrically connected to the wiring layer 224. A solder resist layer 240 and a cover layer (not shown) are also disposed on the ground layer GND2.

[0017] As shown in FIG2A, the stretchable conductive layer 236 of the internal structure 230 is disposed between the first external structure 210 and the second external structure 220. The stretchable conductive layer 236 includes two central metal units CU1 and CU2 located in the central region CR and a first outer metal unit LU1 located in the first outer region PR1, wherein the two central metal units CU1 and CU2 are separated from each other. In detail, the central metal units CU1 and CU2 are disposed between the ground layer GND1 and the ground layer GND2. The first outer metal unit LU1 is disposed between the inner insulating layer 232 and the outer insulating layer 222.

[0018] Referring again to FIG. 2A, the central metal units CU1 and CU2 and the first outer metal unit LU1 are separated from each other. The central metal units CU1 and CU2 define a first cavity CA1 in the internal structure 230, wherein the transmission line TL is located between the central metal units CU1 and CU2. The central metal unit CU1 and the first outer metal unit LU1 define a second cavity CA2 in the internal structure 230. A first magnetic force is generated between the energized first coil circuit C1 and the energized second coil circuit C2, and the first magnetic force is used to change the second thickness T2 of the second cavity CA2. In other words, the first magnetic force can be used to change the distance between the first outer structure 210 and the second outer structure 220 in the first outer region PR1.

[0019] Please refer to FIG. 2A. In some embodiments, the first external structure 210 further includes a first active element D1 located in the first outer region PR1. In some embodiments, the first current of the first coil circuit C1 is provided by the first active element D1. In some embodiments, the second external structure 220 further includes a second active element D2 located in the first outer region PR1. In some embodiments, the second current of the second coil circuit C2 is provided by the second active element D2, an external electronic component (not shown), or an external power supply (not shown).

[0020] As shown in FIG2A, the internal structure 230 further includes an adhesive layer 250 disposed between the internal insulating layer 232 and the first external structure 210. Specifically, the first internal wiring layer 234 and the adhesive layer 250 are located on the same layer, wherein the adhesive layer 250 is disposed around the first coil circuit C1 and the ground layer GND1. In some embodiments, the material of the adhesive layer 250 is an insulating material.

[0021] In the embodiment of FIG. 2A, the first cavity CA1 is filled with air, so the transmission line TL is surrounded by air on three sides, with the fourth side of the transmission line TL being the external insulating layer 222. The second cavity CA2 is also filled with air. The first coil circuit C1 and the second coil circuit C2 can both be regarded as current-carrying circular coils. Therefore, when the first coil circuit C1 and the second coil circuit C2 are energized, N-pole magnetic field and S-pole magnetic field are generated on both sides of the first coil circuit C1 and the second coil circuit C2, respectively.

[0022] Referring again to FIG. 2A, the circuit board 200 has a second outer region PR2 adjacent to the central region CR, the central region CR being located between the first outer region PR1 and the second outer region PR2. The first internal wiring layer 234 further includes a third coil loop C3 located in the second outer region PR2, the third coil loop C3 being electrically connected to the wiring layer 214 of the first external structure 210. The ground layer GND1 is not electrically connected to the third coil loop C3. The second internal wiring layer 238 further includes a fourth coil loop C4 located in the second outer region PR2, the fourth coil loop C4 being electrically connected to the wiring layer 224 of the second external structure 220, the third coil loop C3 being disposed relative to the fourth coil loop C4. The transmission line TL is not electrically connected to the fourth coil loop C4. An adhesive layer 250 is also disposed around the third coil loop C3.

[0023] The top view of the second coil circuit C2, the third coil circuit C3, and the fourth coil circuit C4 in Figure 2A is similar to the top view of the first coil circuit C1 in Figure 2B. It should be noted that, for the sake of simplification, the number of turns in the second coil circuit C2, the third coil circuit C3, and the fourth coil circuit C4 is not limited to those shown in the figure.

[0024] Please refer to Figure 2A. Since the central metal units CU1 and CU2 are disposed between ground layer GND1 and ground layer GND2, the first cavity CA1 forms a shield cavity, which can prevent the transmission line TL from being interfered with by the coil circuit (e.g., the first coil circuit C1 to the fourth coil circuit C4).

[0025] Referring again to FIG. 2A, the stretchable conductive layer 236 further includes a second outer metal unit LU2 located in the second outer region PR2, two central metal units CU1 and CU2 and the second outer metal unit LU2 being separated from each other, and the central metal unit CU2 and the second outer metal unit LU2 defining a third cavity CA3 in the internal structure 230. The first cavity CA1 is located between the second cavity CA2 and the third cavity CA3. A second magnetic force is generated between the energized third coil circuit C3 and the energized fourth coil circuit C4, and the second magnetic force is used to change the third thickness T3 of the third cavity CA3. In other words, the second magnetic force can be used to change the distance between the first outer structure 210 and the second outer structure 220 in the second outer region PR2. In the embodiment of FIG. 2A, the third cavity CA3 is filled with air.

[0026] Please refer to FIG. 2A. In some embodiments, the first external structure 210 further includes a third active element D3 located in the second outer region PR2. In some embodiments, the third current of the third coil circuit C3 is provided by the third active element D3. In some embodiments, the second external structure 220 further includes a fourth active element D4 located in the second outer region PR2. In some embodiments, the fourth current of the fourth coil circuit C4 is provided by the fourth active element D4, an external electronic component (not shown), or an external power supply (not shown).

[0027] In some embodiments, the stretchable conductive layer 236 (comprising central metal units CU1 and CU2, a first outer metal unit LU1, and a second outer metal unit LU2) is made of a stretchable resin and silver powder. The stretchable conductive layer 236 may be formed using stretchable conductive ink or stretchable conductive fibers.

[0028] In one specific example, the material of the stretchable conductive layer 236 is commercially available JY-12 high-conductivity silver paste. The material of the stretchable conductive layer 236 has good conductivity, adhesion, and stretchability, and complies with the EU environmental protection RoHS (Restriction of Hazardous Substances) testing standards. The high-conductivity silver paste has excellent adhesion to substrates such as thermoplastic polyurethane (TPU), polyethylene terephthalate (PET), and polyimide (PI).

[0029] The aforementioned active elements (e.g., the first active element D1 to the fourth active element D4) can control the current supplied to the coil circuit (e.g., the first coil circuit C1 to the fourth coil circuit C4), such as the current magnitude, current direction and current type, so that the coil circuit obtains magnetic fields of different intensities, different directions and different types.

[0030] Figures 3, 4, and 5 are cross-sectional schematic diagrams of the circuit board 200 of Figure 2A in different states. Referring to the circuit board 200a in Figure 3, when the direction of the first magnetic field of the first coil circuit C1 is the same as the direction of the second magnetic field of the second coil circuit C2, the second thickness of the second cavity CA2 decreases. In other words, the second thickness T2' in Figure 3 is less than the second thickness T2 in Figure 2A. The term "magnetic field direction" as used herein refers to the direction of the N pole magnetic field or the direction of the S pole magnetic field.

[0031] For example, when the first coil circuit C1 viewed from above has a clockwise current direction, the N pole of the magnetic field is below the first coil circuit C1, and the S pole of the magnetic field is above the first coil circuit C1. When the second coil circuit C2 viewed from above also has a clockwise current direction, the N pole of the magnetic field is below the second coil circuit C2, and the S pole of the magnetic field is above the second coil circuit C2. Since the N pole of the first coil circuit C1 will attract the S pole of the second coil circuit C2, and the stretchable conductive layer 236 is stretchable, the height of the central metal unit CU1 and the first outer metal unit LU1 will become shorter, thereby reducing the second thickness of the second cavity CA2.

[0032] Similarly, based on the same principle, since the N pole of the third coil circuit C3 is attracted to the S pole of the fourth coil circuit C4, the height of the central metal unit CU2 and the second outer metal unit LU2 will become shorter, thereby reducing the third thickness of the third cavity CA3. Therefore, the third thickness T3' in Figure 3 is less than the third thickness T3 in Figure 2A. Since the heights of both the central metal units CU1 and CU2 become shorter, the second thickness of the second cavity CA2 also decreases accordingly.

[0033] Referring to circuit board 200b in Figure 4, when the direction of the first magnetic field of the first coil circuit C1 is different from the direction of the second magnetic field of the second coil circuit C2, the second thickness of the second cavity CA2 increases. In other words, the second thickness T2'' in Figure 4 is greater than the second thickness T2 in Figure 2A.

[0034] For example, when the first coil circuit C1 viewed from above has a clockwise current direction, the N pole of the magnetic field is below the first coil circuit C1, and the S pole of the magnetic field is above the first coil circuit C1. When the second coil circuit C2 viewed from above has a counterclockwise current direction, the N pole of the magnetic field is above the second coil circuit C2, and the S pole of the magnetic field is below the second coil circuit C2. Since the N pole of the first coil circuit C1 and the N pole of the second coil circuit C2 repel each other, and the stretchable conductive layer 236 is stretchable, the height of the central metal unit CU1 and the first outer metal unit LU1 will increase, thereby increasing the second thickness of the second cavity CA2.

[0035] Similarly, based on the same principle, since the N pole of the third coil circuit C3 repels the N pole of the fourth coil circuit C4, the height of the central metal unit CU2 and the second outer metal unit LU2 will increase, thereby increasing the third thickness of the third cavity CA3. Therefore, the third thickness T3'' in Figure 4 is greater than the third thickness T3 in Figure 2A. Since the heights of both the central metal units CU1 and CU2 increase, the second thickness of the second cavity CA2 also increases accordingly.

[0036] Referring to circuit board 200c in Figure 5, when the direction of the first magnetic field of the first coil circuit C1 is the same as the direction of the second magnetic field of the second coil circuit C2, the second thickness of the second cavity CA2 decreases. When the direction of the third magnetic field of the third coil circuit C3 is different from the direction of the fourth magnetic field of the fourth coil circuit C4, the third thickness of the third cavity CA3 increases. In other words, the second thickness T2''' in Figure 5 is less than the second thickness T2 in Figure 2A, and the third thickness T3''' in Figure 5 is greater than the third thickness T3 in Figure 2A.

[0037] In the embodiment of FIG5, since the thickness of one side of the circuit board 200c is reduced and the thickness of the other side of the circuit board 200c is increased, the second external structure 220 is tilted relative to the first external structure 210.

[0038] Please refer to Figures 2A, 3, 4, and 5. In some embodiments, the materials of circuit layer 214, circuit layer 224, first internal circuit layer 234, and second internal circuit layer 238 may be conductive materials such as copper, gold, or silver, but are not limited thereto. The materials of the insulating layers (e.g., outer insulating layer 212, outer insulating layer 222, and inner insulating layer 232) may be insulating materials such as polyimide (PI), glass fiber epoxy resin (FR4), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyethylene (PE), but are not limited thereto.

[0039] It is understood that the number of insulating layers (e.g., outer insulating layer 212, outer insulating layer 222, and inner insulating layer 232) and circuit layers (e.g., circuit layer 214, circuit layer 224, first inner circuit layer 234, and second inner circuit layer 238) in circuit boards 200, 200a, 200b, and 200c are not limited to those illustrated in Figures 2A, 3, 4, and 5. In other words, in other embodiments, circuit boards 200, 200a, 200b, and 200c may contain more layers of insulating layers and circuit layers. Different numbers of coil loops (e.g., first coil loop C1 to fourth coil loop C4) can be placed at required locations to increase the aforementioned first and second magnetic forces.

[0040] In circuit boards 200, 200a, 200b and 200c, there are no other metal materials above and below the first cavity CA1 except for ground layer GND1 and ground layer GND2. Therefore, the weight of the circuit board 200 in the central region CR can be reduced, making the thickness of the first cavity CA1 more easily increase or decrease with the thickness of the second cavity CA2 and the third cavity CA3.

[0041] It is understood that, for the sake of convenience in illustrating the stacked structure, in circuit boards 200, 200a, 200b, and 200c, the active elements (e.g., the first active element D1 to the fourth active element D4), the coil circuits (e.g., the first coil circuit C1 to the fourth coil circuit C4), and the cavities (e.g., the second cavity CA2 and the third cavity CA3) may not be on the same cross section. In other words, the actual active elements can be connected above the non-cavity area via wires. The aforementioned first cavity CA1 to third cavity CA3 can also be understood as "dielectric layers".

[0042] Figures 6A to 6G are cross-sectional schematic diagrams of the circuit board 200 of Figure 2A at various stages of the manufacturing process. Referring to Figure 6A, a first original external substrate 610 is provided. The first original external substrate 610 includes an internal insulating layer 232 and a first original metal layer 612 disposed on the internal insulating layer 232. The first original external substrate 610 has a corresponding central region CR and a first outer region PR1 and a second outer region PR2 adjacent to the central region CR. The central region CR is located between the first outer region PR1 and the second outer region PR2.

[0043] Referring to FIG6B, a second original external substrate 620 is provided, wherein the second original external substrate 620 includes an external insulating layer 222 and a second original metal layer 622 disposed on the external insulating layer 222. The second original external substrate 620 has a corresponding central region CR and a first outer region PR1 and a second outer region PR2 adjacent to the central region CR.

[0044] Referring still to FIG6B, a second internal circuit layer 238 is formed on the second original external substrate 620, wherein the second internal circuit layer 238 includes a transmission line TL located in the central region CR, a second coil circuit C2 located in the first outer region PR1, and a fourth coil circuit C4 located in the second outer region PR2.

[0045] Referring to FIG. 6C, a stretchable conductive layer 236 is formed on the second original outer substrate 620. In some embodiments, the stretchable conductive layer 236 can be formed by processes such as screen printing, gravure printing, transfer printing, and spraying. Specifically, the stretchable conductive layer 236 includes central metal units CU1 and CU2, a first outer metal unit LU1, and a second outer metal unit LU2, and each metal unit is separated from the others. The central metal units CU1 and CU2 are located in the central region CR, the first outer metal unit LU1 is located in the first outer region PR1, and the second outer metal unit LU2 is located in the second outer region PR2. The central metal units CU1 and CU2 are separated from each other.

[0046] Referring to FIG. 6D, a first original external substrate 610 (refer to FIG. 6A) is formed on the stretchable conductive layer 236. Then, a first original metal layer 612 (refer to FIG. 6A) is formed into a first internal circuit layer 234, wherein the first internal circuit layer 234 includes a first coil loop C1 located in the first outer region PR1, the first coil loop C1 being disposed relative to the second coil loop C2, as shown in FIG. 6D. The first internal circuit layer 234 also includes a ground layer GND1 located in the central region CR and a third coil loop C3 located in the second outer region PR2.

[0047] Referring to FIG6E, a first original external structure 630 is formed on the first internal circuit layer 234 using an adhesive layer 250. The first original external structure 630 includes an original external insulating layer 632 and a third original metal layer 634 disposed on the original external insulating layer 632.

[0048] Referring to FIG. 6F, a plurality of vias H1 and H3 are formed in the original outer insulating layer 632 (refer to FIG. 6E), making the original outer insulating layer 632 an outer insulating layer 212. Via H1 is electrically connected to the first coil circuit C1, and via H3 is electrically connected to the third coil circuit C3. A plurality of vias H2 and H4 are formed in the outer insulating layer 222. Via H2 is electrically connected to the second coil circuit C2, and via H4 is electrically connected to the fourth coil circuit C4. The vias H1, H2, H3, and H4 can be formed using electroplating and / or electroless plating.

[0049] Referring to FIG. 6G, a first external structure 210 is formed on the first internal circuit layer 234. Specifically, a third primary metal layer 634 (refer to FIG. 6F) is patterned to form a circuit layer 214 as shown in FIG. 6G. A first coil circuit C1 is electrically connected to the first external structure 210, and a third coil circuit C3 is also electrically connected to the first external structure 210. Similarly, a second primary metal layer 622 (refer to FIG. 6F) is patterned to form a circuit layer 224 as shown in FIG. 6G. A second coil circuit C2 is electrically connected to the second external structure 220, and a fourth coil circuit C4 is also electrically connected to the second external structure 220.

[0050] In other words, the second original external substrate 620 (see FIG. 6E) is used to form the second external structure 220 (see FIG. 6G). Still referring to FIG. 6G, the second external structure 220 includes a ground layer GND2 located in the central region CR. Then, a solder resist layer 240 and a cover layer (not shown) are formed on a portion of the circuit layer 224 of the second external structure 220.

[0051] Refer to Figures 6G and 2A, a first active element D1 is formed to be electrically connected to the first coil circuit C1, a second active element D2 is formed to be electrically connected to the second coil circuit C2, a third active element D3 is formed to be electrically connected to the third coil circuit C3, and a fourth active element D4 is formed to be electrically connected to the fourth coil circuit C4.

[0052] The circuit board with adjustable dielectric layer thickness of the present invention has the following advantages in the microwave and radio frequency fields: (1) improved matching characteristics, (2) control of phase delay, (3) reduced loss, (4) enhanced flexibility, (5) support for wideband operation, and (6) optimized size and weight. Detailed description follows.

[0053] (1) Improve matching characteristics: By adjusting the thickness of the air dielectric layer, the effective dielectric constant of the transmission line can be changed, thereby affecting its characteristic impedance. As a result, the impedance matching between the transmission line and the load can be optimized at different frequencies, reducing reflection loss and improving energy transmission efficiency.

[0054] (2) Controlling phase delay: Changes in the thickness of the air dielectric layer directly affect the signal propagation speed and phase delay. This is beneficial for applications that require precise phase control (e.g., phased array antenna systems), where fine-tuning of the signal phase can be achieved by dynamically adjusting the dielectric layer thickness.

[0055] (3) Reduced loss: A thinner air dielectric layer usually means lower dielectric loss because electromagnetic waves propagate in a vacuum or air with less attenuation than in a solid medium. Therefore, the use of adjustable air dielectric layer thickness in some high-frequency applications can be attributed to reduced energy loss during signal transmission.

[0056] (4) Enhanced flexibility: For some special application scenarios, such as satellite communication or radar systems, it may be necessary to adjust the transmission parameters in real time according to different working environments or mission requirements. The design of adjustable dielectric layer thickness provides greater flexibility to allow the equipment to adapt to changing working conditions.

[0057] (5) Support for wideband operation: Appropriate selection of dielectric layer thickness can enable the transmission line to maintain good performance across the entire wideband, which is beneficial to modern wireless communication systems, especially when multi-band or multi-mode operation is involved.

[0058] (6) Optimize size and weight: For portable or space-constrained applications, the physical size and weight can be reduced without affecting performance by adjusting the thickness of the air medium layer.

[0059] In summary, the circuit board provided by the present invention uses an electromagnetic drive to freely adjust the thickness and morphology of the dielectric layer (e.g., air), thereby improving the transmission performance of the high-frequency and high-speed circuit board.

[0060] The foregoing summary of the features of various embodiments enables those skilled in the art to better understand the nature of this application. Those skilled in the art should understand that this application can be readily used as the basis for designing or modifying other processes and structures to achieve the same purpose and / or realize the same advantages of the embodiments described herein. Those skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of this application, and various changes, substitutions, and modifications can be made without departing from the spirit and scope of this application. [Simplified Explanation of the Diagram]

[0006] The various aspects of this application can be best understood from the following detailed description when read in conjunction with the accompanying drawings. FIG1 is a cross-sectional schematic diagram of a stripline according to an embodiment of the present invention. FIG2A is a cross-sectional schematic diagram of a circuit board according to some embodiments of the present invention. FIG2B is a top view of the first coil circuit of FIG2A. FIG3, 4 and 5 are cross-sectional schematic diagrams of the circuit board of FIG2A in different states. FIG6A to 6G are cross-sectional schematic diagrams of the circuit board of FIG2A at various stages of the manufacturing process.

Claims

1. A circuit board having a central region and a first outer region adjacent to the central region, and comprising: a first outer structure; a second outer structure; and an inner structure disposed between the first outer structure and the second outer structure, wherein the inner structure comprises: an inner insulating layer; a first inner circuit layer disposed between the inner insulating layer and the first outer structure, and comprising a first coil loop located in the first outer region, wherein the first coil loop is electrically connected to the first outer structure; a stretchable conductive layer disposed between the first outer structure and the second outer structure, and comprising two central metal units located in the central region and a first outer metal unit located in the first outer region, wherein the two central metal units are separated from each other; and a second inner circuit layer disposed on the second outer structure, and comprising a transmission line located in the central region and a second coil loop located in the first outer region, wherein the second coil loop is electrically connected to the second outer structure, and the first coil loop is disposed relative to the second coil loop.

2. The circuit board as claimed in claim 1, wherein the two central metal units are separated from the first outer metal unit, and the material of the stretchable conductive layer comprises stretchable resin and silver powder, wherein the two central metal units define a first cavity in the internal structure, and one of the two central metal units and the first outer metal unit define a second cavity in the internal structure, wherein a first magnetic force is generated between the energized first coil circuit and the energized second coil circuit, and the first magnetic force is used to change a second thickness of the second cavity, wherein the first outer structure further includes a first active element located in the first outer region, and a first current of the first coil circuit is provided by the first active element.

3. The circuit board as claimed in claim 2, wherein the first cavity is filled with air, the second cavity is filled with air, and the internal structure further includes an adhesive layer disposed between the internal insulating layer and the first external structure.

4. The circuit board as claimed in claim 3, wherein the second thickness of the second cavity is reduced when a first magnetic field direction of the first coil circuit is the same as a second magnetic field direction of the second coil circuit.

5. The circuit board as claimed in claim 3, wherein the second thickness of the second cavity increases when a first magnetic field direction of the first coil circuit is different from a second magnetic field direction of the second coil circuit.

6. The circuit board as claimed in claim 4, wherein the circuit board has a second outer region adjacent to the central region, the central region being located between the first outer region and the second outer region, wherein the first inner circuit layer further includes a third coil loop located in the second outer region, the third coil loop being electrically connected to the first outer structure, wherein the second inner circuit layer further includes a fourth coil loop located in the second outer region, the fourth coil loop being electrically connected to the second outer structure, and the third coil loop being disposed relative to the fourth coil loop, wherein the stretchable conductive layer further includes a second outer metal unit located in the second outer region, the two central metal units being separate from the second outer metal unit, and the other of the two central metal units and the second outer metal unit defining a third cavity in the inner structure.

7. The circuit board as claimed in claim 6, wherein the third cavity is filled with air, wherein a second magnetic force is generated between the energized third coil circuit and the energized fourth coil circuit, and the second magnetic force is used to change a third thickness of the third cavity, wherein the third thickness of the third cavity increases when the direction of a third magnetic field of the third coil circuit is different from the direction of a fourth magnetic field of the fourth coil circuit.

8. A method of manufacturing a circuit board, comprising: providing a first original external substrate and a second original external substrate, wherein the first original external substrate and the second original external substrate each have a corresponding central region and a first outer region adjacent to the central region, wherein the first original external substrate includes an internal insulating layer and a first original metal layer disposed on the internal insulating layer; forming a second internal circuit layer on the second original external substrate, wherein the second internal circuit layer includes a transmission line located in the central region and a second coil loop located in the first outer region; forming a stretchable conductive layer on the second original external substrate; forming the first original external substrate on the stretchable conductive layer; forming the first original metal layer into a first internal circuit layer, wherein the first internal circuit layer includes a first coil loop located in the first outer region, the first coil loop being disposed relative to the second coil loop; and forming a first external structure on the first internal circuit layer, wherein the first coil loop is electrically connected to the first external structure.

9. The method of manufacturing a circuit board as claimed in claim 8 further comprises: forming a second external structure from the second original external substrate; and forming a solder resist layer and a cover layer on a portion of the second external structure.

10. A method of manufacturing a circuit board as claimed in claim 8, wherein the stretchable conductive layer comprises two central metal units located in the central region and a first outer metal unit located in the first outer region, wherein the two central metal units and the first outer metal unit are separated from each other, wherein the first external structure comprises a first active element located in the first outer region.