Circuit board assembly and manufacturing method thereof

Abstract

A circuit board assembly includes a circuit board, an electronic component stack structure disposed in the circuit board, a first conductive pillar and a second conductive pillar. The circuit board includes a first connection wiring layer and a second connection wiring layer disposed on the first connection wiring layer. The electronic component stack structure has a sidewall and includes a first electronic component and a second electronic component disposed on the first electronic component. The first conductive pillar and the second conductive pillar are disposed on the sidewall and extend in a first direction away from the sidewall. The first conductive pillar is electrically connected to the first electronic component and the first connection wiring layer. The second conductive pillar is located on the first conductive pillar and is electrically connected to the second electronic component and the second connection wiring layer. In the first direction, the distance between the first connection wiring layer and the sidewall is smaller than the distance between the second connection wiring layer and the sidewall, and the length of the first conductive pillar is shorter than the length of the second conductive pillar.

Description

Circuit board assembly and its manufacturing method This invention relates to a circuit board assembly and a method for manufacturing the same. With the advancement of technology, the market demands for miniaturization, high frequency, high speed, and multifunctionality in electronic products are increasing. Therefore, one of the research goals in this field is to find a way to incorporate multiple chips into a circuit board to achieve high frequency, high speed, and multifunctionality while simultaneously meeting the requirements for miniaturization. At least one embodiment of the present invention provides a circuit board assembly that can reduce the space fanned out by electronic components, thereby achieving the requirement of overall miniaturization. At least another embodiment of the present invention provides a method for manufacturing the above-described circuit board assembly, which helps to reduce the space fanned out by electronic components in the circuit board assembly, thereby achieving the requirement of miniaturization of the overall size. A method for manufacturing a circuit board assembly according to at least one embodiment of the present invention includes the following steps: An electronic component stack structure is provided, the electronic component stack structure having sidewalls. A substrate is provided, the substrate having a surface and through-holes. The electronic component stack structure is disposed in the through-holes. After the electronic component stack structure is disposed in the through-holes, a photoresist layer is attached to the surface. A first opening and a second opening exposing the sidewalls are formed in the photoresist layer. A first conductive pillar is formed in the first opening and a first conductive portion is formed in the second opening. After forming the first conductive pillar and the first conductive portion, a second conductive portion is formed in the second opening, and the second conductive portion connects to the first conductive portion to form a second conductive pillar. The first conductive pillar and the second conductive pillar are connected to the sidewalls, and the length of the second conductive pillar is greater than the length of the first conductive pillar. An initial circuit board is provided, the initial circuit board having a stepped opening and including a first connection layer and a second connection layer. The electronic component stack structure, the first conductive pillar, and the second conductive pillar are disposed in the stepped opening, the first conductive pillar being electrically connected to the first connection layer, and the second conductive pillar being electrically connected to the second connection layer. In at least one embodiment of the present invention, the method of manufacturing the circuit board assembly further includes the following steps: stacking and molding a first electronic component, a second electronic component, and a third electronic component to form an initial electronic component stack structure; grinding the initial electronic component stack structure to form the electronic component stack structure, wherein the first electronic component includes a first pad exposed on the sidewall, the second electronic component includes a second pad exposed on the sidewall, and the first conductive post and the second conductive post are respectively connected to the first pad and the second pad. In at least one embodiment of the present invention, the step of forming the second conductive post includes the following steps: After forming the first conductive post and the first conductive portion, a shielding layer is attached to cover the first opening. After attaching the shielding layer, the second conductive portion is formed in the second opening, and the second conductive portion is connected to the first conductive portion to form the second conductive post. In at least one embodiment of the present invention, the method of manufacturing the circuit board assembly further includes the following steps: After the electronic component stack structure, the first conductive pillar, and the second conductive pillar are disposed in the stepped opening, a lamination build-up structure is used to cover the stepped opening to form a circuit board. In at least one embodiment of the present invention, the stepped opening includes a bottom, a middle portion and an opening portion, the middle portion is located between the bottom and the opening portion, and the width of the opening portion is greater than the width of the middle portion, while the width of the middle portion is greater than the width of the bottom. In at least one embodiment of the present invention, the method of manufacturing the circuit board assembly further includes the following steps: Before placing the electronic component stack structure, the first conductive post, and the second conductive post into the stepped opening, solder balls are respectively disposed on the first connection line layer and the second connection line layer, and the first conductive post and the second conductive post are electrically connected to the first connection line layer and the second connection line layer respectively through the solder balls. A circuit board assembly according to at least one embodiment of the present invention includes a circuit board, an electronic component stack structure, a first conductive post, and a second conductive post. The circuit board includes a first interconnect layer and a second interconnect layer disposed on the first interconnect layer. The electronic component stack structure is disposed in the circuit board and has sidewalls, and includes a first electronic component and a second electronic component. The first electronic component is electrically connected to the first interconnect layer, and the second electronic component is disposed on the first electronic component and electrically connected to the second interconnect layer. The first conductive post is disposed on the sidewall and extends in a first direction away from the sidewall, and is electrically connected to the first electronic component and the first interconnect layer. The second conductive post is disposed on the sidewall and extends along the first direction, and is located on the first conductive post and is electrically connected to the second electronic component and the second interconnect layer. In the first direction, the distance between the first interconnect layer and the sidewall is less than the distance between the second interconnect layer and the sidewall, and the length of the first conductive post is less than the length of the second conductive post. In at least one embodiment of the present invention, the electronic component stack structure has an upper surface and further includes a third electronic component disposed on the second electronic component, the third electronic component including a third pad exposed on the upper surface. In at least one embodiment of the present invention, the circuit board further includes an add-on structure disposed on the third electronic component, the add-on structure having a conductive via disposed on the third pad and electrically connected to the third pad. In at least one embodiment of the present invention, the second conductive post includes a first conductive portion and a second conductive portion connected to the first conductive portion, and there is a boundary between the first conductive portion and the second conductive portion. In the following text, to clearly present the technical features of the present invention, the dimensions (e.g., length, width, thickness, and depth) of the elements (e.g., layers, films, substrates, and regions) in the drawings will be enlarged proportionally, and the number of some elements may be reduced. Therefore, the description and explanation of the embodiments below are not limited to the number of elements in the drawings or the size and shape of the elements, but should cover the dimensions, shapes, and deviations from both caused by actual manufacturing processes and / or tolerances. For example, a flat surface shown in the drawings may have rough and / or non-linear characteristics, and an acute angle shown in the drawings may be rounded. Therefore, the elements presented in the drawings of the present invention are mainly for illustration and are not intended to accurately depict the actual shape of the elements, nor are they intended to limit the scope of the claims of the present invention. Secondly, the terms "approximately," "about," or "substantially" used in this invention not only cover explicitly stated numerical values ​​and ranges, but also the permissible deviation range understood by someone skilled in the art to which this invention pertains. This deviation range can be determined by errors that occur during measurement, which may arise from limitations of the measurement system or process conditions, for example. For instance, two objects (e.g., planes or traces of a substrate) are "substantially parallel" or "substantially perpendicular," where "substantially parallel" and "substantially perpendicular" respectively indicate that the parallelism and perpendicularity between the two objects can include non-parallelism and non-perpendicularity caused by permissible deviation ranges. The spatial relative terms used in this invention, such as "below," "under," "above," and "above," are for the convenience of describing the relative relationship between one element or feature and another, as illustrated in the figures. The true meaning of these spatial relative terms includes other orientations. For example, when the illustration is rotated 180 degrees vertically, the relationship between one element and another may change from "below" or "under" to "above" or "above." Furthermore, the spatial relative descriptions used in this invention should be interpreted in the same way. It should be understood that although the present invention may use terms such as "first," "second," and "third" to describe various elements or features, these elements or features should not be limited by these terms. These terms are primarily used to distinguish one element from another, or one feature from another. Furthermore, the term "or" as used in the present invention may, as appropriate, include any combination of one or more of the associated listed items. Although this invention uses a series of operations or steps to illustrate the manufacturing method, the order in which these operations or steps are shown should not be construed as a limitation of the invention. For example, some operations or steps may be performed in a different order and / or simultaneously with other steps. Furthermore, each operation or step described herein may comprise several sub-steps or actions. Furthermore, the present invention can be implemented or applied through other different specific embodiments, and the details of the present invention can also be combined, modified and changed in various embodiments based on different viewpoints and applications without departing from the concept of the present invention. Figure 1 is a partial cross-sectional schematic diagram of a circuit board assembly 10 according to at least one embodiment of the present invention. The circuit board assembly 10 includes a circuit board 100, an electronic component stack structure 200, first conductive pillars 300, 300' and second conductive pillars 400, 400'. The circuit board 100 includes first connection line layers 102, 102' and second connection line layers 104, 104' disposed on the first connection line layers 102, 102'. An electronic component stack structure 200 is disposed in a circuit board 100 and has sidewalls SW and SW', and includes a first electronic component 202 and a second electronic component 204. The first electronic component 202 is electrically connected to first connection line layers 102 and 102', and the second electronic component 204 is disposed on the first electronic component 202 and electrically connected to second connection line layers 104 and 104'. First conductive posts 300 and 300' are disposed on the sidewalls SW and SW' and extend in a first direction D1 and D1' away from the sidewalls SW and SW', and are electrically connected to the first electronic component 202 and the first connection line layers 102 and 102'. Second conductive posts 400 and 400' are disposed on the sidewalls SW and SW' and extend along the first direction D1 and D1', and are located on the first conductive posts 300 and 300' and are electrically connected to the second electronic component 204 and the second connection line layers 104 and 104'. In the first direction D1, the distance R1 between the first connecting line layer 102 and the side wall SW is less than the distance R2 between the second connecting line layer 104 and the side wall SW, and the length L1 of the first conductive post 300 is less than the length L2 of the second conductive post 400. Similarly, in the first direction D1', the distance (unlabeled) between the first connecting line layer 102' and the side wall SW' is less than the distance (unlabeled) between the second connecting line layer 104' and the side wall SW', and the length (unlabeled) of the first conductive post 300' is less than the length (unlabeled) of the second conductive post 400'. Since the first electronic component 202 and the second electronic component 204 of the electronic component stacking structure 200 can be electrically connected to the first connection line layer 102, 102' and the second connection line layer 104, 104' at different distances from the sidewalls SW, SW' by first conductive pillars 300, 300' and second conductive pillars 400, 400' respectively disposed on the sidewalls SW, SW', the space fanned out by the first electronic component 202 and the second electronic component 204 can be reduced, thereby achieving the requirement of miniaturization of the overall size of the circuit board assembly 10. Please refer to Figure 1. The first electronic component 202 includes first pads P1 and P1', and the second electronic component 204 includes second pads P2 and P2'. The first pads P1 and P1' and the second pads P2 and P2' are exposed on the sidewalls SW and SW'. The first conductive posts 300 and 300' contact the first pads P1 and P1' and the first connection circuit layers 102 and 102' to electrically connect the first electronic component 202 and the first connection circuit layers 102 and 102'. The second conductive posts 400 and 400' contact the second pads P2 and P2' and the second connection circuit layers 104 and 104' to electrically connect the second electronic component 204 and the second connection circuit layers 104 and 104'. The electronic component stack structure 200 has an upper surface US and further includes a third electronic component 206 disposed on the second electronic component 204. The third electronic component 206 includes a third pad P3 exposed on the upper surface US. The circuit board 100 further includes an add-on structure 500 disposed on the third electronic component 206. The add-on structure 500 has a conductive via CV disposed on and electrically connected to the third pad P3. With the aforementioned design, the space fanned out by the third electronic component 206 can be reduced, thereby achieving the requirement of miniaturization of the overall size of the circuit board assembly 10. As shown in Figure 1, the second connection lines 104 and 104' are respectively disposed on the first connection lines 102 and 102' along the second direction D2, the second electronic component 204 is disposed on the first electronic component 202 along the second direction D2, the third electronic component 206 is disposed on the second electronic component 204 along the second direction D2, the layer addition structure 500 is disposed on the third electronic component 206 along the second direction D2, and the second conductive pillars 400 and 400' are respectively disposed on the first conductive pillars 300 and 300' along the second direction D2. In other words, in the second direction D2, the second connection lines 104 and 104' partially overlap with the first connection lines 102 and 102', respectively; the first electronic component 202, the second electronic component 204, and the third electronic component 206 overlap with each other; and the first electronic component 202, the second electronic component 204, and the third electronic component 206 partially overlap with the layer-addition structure 500; the second conductive pillars 400 and 400' partially overlap with the first conductive pillars 300 and 300', respectively. In the second direction D2, the conductive via CV partially overlaps with and contacts the third pad P3, and the second direction D2 is substantially perpendicular to the first directions D1 and D1'. The second direction D2 can be, for example, the normal direction of the circuit board 100. Furthermore, the circuit board 100 further includes an add-on structure 500' disposed opposite to the add-on structure 500, namely, the add-on structure 500', the electronic component stack structure 200, and the add-on structure 500 are stacked along the second direction D2. The sidewalls (unlabeled) of the first electronic component 202, the second electronic component 204, and the third electronic component 206 are aligned with each other in the second direction D2 to form the sidewalls SW and SW' of the electronic component stack structure 200, which can reduce the space occupied by the electronic component stack structure 200 in the circuit board 100, thereby achieving the requirement of miniaturization of the overall size of the circuit board assembly 10. The first conductive post 300 and the second conductive post 400 are disposed on the right sidewall SW of the electronic component stack structure 200 and extend in a first direction D1 away from the right sidewall SW. The ends of the first conductive post 300 and the second conductive post 400 adjacent to the sidewall SW respectively contact the first pad P1 and the second pad P2 exposed on the right sidewall SW. The ends of the first conductive post 300 and the second conductive post 400 away from the sidewall SW are electrically connected to the first connection line layer 102 and the second connection line layer 104 located on the right side of the electronic component stack structure 200 via solder balls (unlabeled). The first conductive post 300' and the second conductive post 400' are disposed on the left sidewall SW' of the electronic component stack structure 200 and extend in a first direction D1' away from the left sidewall SW'. The ends of the first conductive post 300' and the second conductive post 400' adjacent to the sidewall SW' respectively contact the first pad P1' and the second pad P2' exposed on the left sidewall SW'. The ends of the first conductive post 300' and the second conductive post 400' away from the sidewall SW' are electrically connected to the first connection line layer 102' and the second connection line layer 104' located on the left side of the electronic component stack structure 200 via solder balls (unlabeled). In some embodiments, the first directions D1 and D1' are substantially 180 degrees apart. The diameter M1 of the first conductive post 300 and the diameter M2 of the second conductive post 400 are both 10 micrometers to 40 micrometers. In the first direction D1, the length L1 of the first conductive post 300 is 10 micrometers to 40 micrometers, and the length L2 of the second conductive post 400 is 50 micrometers to 80 micrometers. In the second direction D2, the distance d between the first conductive post 300 and the second conductive post 400 is 10 micrometers to 50 micrometers. Similarly, the diameters (unlabeled) of the first conductive post 300' and the second conductive post 400' are 10 micrometers to 40 micrometers, respectively. In the first direction D1, the length (unlabeled) of the first conductive post 300' is 10 micrometers to 40 micrometers, and the length (unlabeled) of the second conductive post 400' is 50 micrometers to 80 micrometers. In the second direction D2, the distance (unlabeled) between the first conductive post 300' and the second conductive post 400' is 10 micrometers to 50 micrometers. In some embodiments, the first electronic component 202, the second electronic component 204, and the third electronic component 206 may be wafers. The materials of the first interconnect layers 102, 102', the second interconnect layers 104, 104', the first conductive pillars 300, 300', the second conductive pillars 400, 400', the first pads P1, P1', the second pads P2, P2', the third pad P3, and the conductive vias CV may include metals, such as copper. The materials of the add-on structures 500, 500' may include resins, such as low-flow prepreg or no-flow prepreg. Furthermore, the number of electronic components, interconnect layers, conductive pillars, pads, conductive vias, and solder balls is not limited to the embodiments of the present invention; in other embodiments, the number of the aforementioned components may be increased or decreased according to the product requirements of the circuit board assembly. Figures 2A to 2Q are partial cross-sectional views of the circuit board assembly 10 of Figure 1 at different process stages. First, referring to Figures 2A and 2B, the first electronic component 202, the second electronic component 204, and the third electronic component 206 are stacked and molded to form an initial electronic component stack structure 200I. Specifically, as shown in FIG2A, a first electronic component 202, a second electronic component 204, and a third electronic component 206 are provided. As shown in FIG2B, the first electronic component 202, the second electronic component 204, and the third electronic component 206 are stacked, and a through-hole TH is formed between the first electronic component 202, the second electronic component 204, and the third electronic component 206 to electrically connect the first pads P1, P1' of the first electronic component 202, the second pads P2, P2' of the second electronic component 204, and the third pads P3, P3' of the third electronic component 206. A molding layer ML is provided to mold the first electronic component 202, the second electronic component 204, and the third electronic component 206 to form an initial electronic component stack structure 200I. In some embodiments, the material of the molding layer ML may include resin. Next, referring to FIG2C, the initial electronic component stack structure 200I is ground to form the electronic component stack structure 200. The electronic component stack structure 200 has sidewalls SW, SW', and the first electronic component 202 includes first pads P1, P1' exposed on the sidewalls SW, SW', and the second electronic component 204 includes second pads P2, P2' exposed on the sidewalls SW, SW'. Furthermore, the electronic component stack structure 200 also has a top surface US, and the third electronic component 206 includes third pads P3, P3' exposed on the sidewalls SW, SW' and the top surface US. In some embodiments, the grinding of the initial electronic component stack structure 200I may be performed by a chemical mechanical polishing (CMP) process. Referring to Figure 2D, a substrate BL is provided, having opposing first surfaces S1 and second surfaces S2. Referring to Figure 2E, a through-hole H is formed connecting the first surface S1 and the second surface S2. Referring to Figure 2F, after forming the through-hole H, an adhesive layer AL is attached to the second surface S2. In some embodiments, the formation of the through-hole H may be performed by a laser process or a machining process, such as a milling process. The material of the adhesive layer AL may contain polyimide (PI). Next, referring to Figure 2G, the electronic component stack structure 200 is disposed in the through-hole H, with the sidewall SW contacting the adhesive layer AL. Referring to Figure 2H, after the electronic component stack structure 200 is disposed in the through-hole H, the through-hole H is filled with adhesive material G. Referring to Figure 2I, after filling with adhesive material G, the adhesive layer AL is removed, exposing the sidewalls SW and SW' to adhesive material G. In some embodiments, adhesive material G is a biodegradable adhesive. Referring to Figure 2J, after removing the adhesive layer AL, photoresist layers RL' and RL are attached to the first surface S1 and the second surface S2, respectively. Referring to Figure 2K, first openings O1 and O1' exposing the first pads P1 and P1', and second openings O2 and O2' exposing the second pads P2 and P2' are formed in the photoresist layers RL and RL'. Referring to Figure 2L, first conductive pillars 300 and 300' are formed in the first openings O1 and O1', and first conductive portions 402 and 402' are formed in the second openings O2 and O2'. In some embodiments, attaching the photoresist layers RL' and RL can be performed by a lamination process. Forming the first openings O1 and O1' and the second openings O2 and O2' can be performed by an exposure and development process. Referring to Figure 2M, after forming the first conductive pillars 300, 300' and the first conductive portions 402, 402', shielding layers SL, SL' are applied to cover the first openings O1, O1'. After applying the shielding layers SL, SL', second conductive portions 404, 404' are formed in the second openings O2, O2', and the second conductive portions 404, 404' connect to the first conductive portions 402, 402' to form the second conductive pillars 400, 400'. Since the second conductive pillars 400, 400' are formed by connecting the first conductive portions 402, 402' and the second conductive portions 404, 404', there is a boundary (not labeled) between the first conductive portions 402, 402' and the second conductive portions 404, 404'. In some embodiments, the material of the shielding layers SL, SL' may contain polyimide. The formation of the first conductive pillars 300, 300', the first conductive portions 402, 402' and the second conductive portions 404, 404' can be carried out by an electroplating process. Referring to Figures 2N and 2O, after forming the second conductive pillars 400 and 400', the masking layers SL and SL', the photoresist layers RL and RL', the adhesive material G, and the substrate BL are removed. First, as shown in Figure 2N, the masking layers SL and SL' and the photoresist layers RL and RL' are removed to expose the sidewalls SW and SW', the first conductive pillars 300 and 300', and the second conductive pillars 400 and 400'. Next, as shown in Figure 2O, the adhesive material G and the substrate BL are removed to expose the upper surface US. In some embodiments, the removal of the adhesive material G may be performed by a heating process. Referring to Figure 2P, an initial circuit board 100I is provided, and a stepped opening O is formed in the initial circuit board 100I. The initial circuit board 100I includes a first connection line layer 102, 102' and a second connection line layer 104, 104' exposed in the stepped opening O. Specifically, the stepped opening O includes a bottom BP, a middle portion MP, and an opening OP. The middle portion MP is located between the bottom BP and the opening OP, and the width of the opening OP is greater than the width of the middle portion MP, which in turn is greater than the width of the bottom BP. In some embodiments, the stepped opening O can be formed by a laser process. The width W of the stepped opening O is 500 micrometers to 1000 micrometers, and the depth T of the stepped opening O is 100 micrometers to 150 micrometers. By forming the stepped opening O, the initial circuit board 100I can be layered and recessed, allowing the electronic component stack structure 200 to be completely attached to the initial circuit board 100I, thereby improving reliability. Referring to Figure 2Q, after removing the shielding layers SL, SL', photoresist layers RL, RL', adhesive material G, and substrate BL, the electronic component stack structure 200, the first conductive pillars 300, 300', and the second conductive pillars 400, 400' are disposed in the stepped opening O. The first conductive pillars 300, 300' are electrically connected to the first connection circuit layers 102, 102', and the second conductive pillars 400, 400' are electrically connected to the second connection circuit layers 104, 104'. Specifically, the bottom BP is used to accommodate the electronic component stack structure 200, the middle portion MP is used to accommodate the electronic component stack structure 200 and the first conductive pillars 300, 300', and the opening OP is used to accommodate the electronic component stack structure 200 and the second conductive pillars 400, 400'. The aforementioned design limits the soldering range between the first electronic component 202 and the second electronic component 204 and the first connection line layers 102, 102' and the second connection line layers 104, 104', respectively, and a stable electrical connection can be formed between the first electronic component 202 and the second electronic component 204 and the first connection line layers 102, 102' and the second connection line layers 104, 104', respectively, thereby improving reliability. Furthermore, as shown in Figures 2P and 2Q, before the electronic component stack structure 200, the first conductive pillars 300, 300', and the second conductive pillars 400, 400' are placed in the stepped opening O, solder balls (unlabeled) are placed on the first connection lines 102, 102' and the second connection lines 104, 104', respectively. The first conductive pillars 300, 300' and the second conductive pillars 400, 400' are electrically connected to the first connection lines 102, 102' and the second connection lines 104, 104' through the solder balls. By placing the first conductive pillars 300, 300' and the second conductive pillars 400, 400' in the stepped opening O, signals can directly reach the first connection lines 102, 102' and the second connection lines 104, 104', reducing the surface fan-out area, reducing crosstalk between signals, and improving signal integrity. Next, referring to Figure 1, after the electronic component stack structure 200, the first conductive pillars 300, 300', and the second conductive pillars 400, 400' are disposed in the stepped opening O, the laminated add-on structure 500 covers the stepped opening O to form the circuit board 100. Furthermore, the add-on structure 500' is laminated on the side of the initial circuit board 100I opposite to the stepped opening O, and the add-on structures 500, 500' are patterned to form conductive vias CV and circuit layers (not labeled) to form the circuit board 100. In summary, in the circuit board assembly and manufacturing method of at least one embodiment of the present invention, since the electronic components of the electronic component stack structure can be electrically connected to the connection line layers at different distances from the aforementioned sidewalls by means of conductive pillars of different lengths disposed on the sidewalls of the electronic component stack structure, the space fanned out by the electronic components is reduced, thereby achieving the requirement of miniaturization of the overall size of the circuit board assembly. Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Those skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims. 10: Circuit board assembly 100: Circuit board 100I: Initial circuit board 102, 102': First connection line layer 104, 104': Second connection line layer 200: Electronic component stack structure 200I: Initial electronic component stack structure 202: First electronic component 204: Second electronic component 206: Third electronic component 300, 300': First conductive pillar 400, 400': Second conductive pillar 402, 402': First conductive part 404, 404': Second conductive part 500, 500': Addition layer structure AL: Adhesive layer BL: Substrate BP: Bottom CV Conductive via d: Spacing D1, D1': First direction D2: Second direction G: Adhesive material H: Perforation L1, L2: Length M1, M2: Diameter MP: Middle part ML: Mold sealing layer O: Stepped opening O1, O1': First opening O2, O2': Second opening OP: Opening P1, P1': First pad P2, P2': Second pad P3, P3': Third pad R1, R2: Distance RL, RL': Photoresist layer S1: First surface S2: Second surface SL, SL': Masking layer SW, SW': Sidewall T: Depth TH: Through hole US: Top surface W: Width Figure 1 is a partial cross-sectional schematic diagram of a circuit board assembly according to at least one embodiment of the present invention. Figures 2A to 2Q are partial cross-sectional views of the circuit board assembly of Figure 1 at different process stages. Domestic storage information (please note in order of storage institution, date, and number): None. International storage information (please note in order of storage country, institution, date, and number): None. 10: Circuit board assembly 100: Circuit board 102, 102': First connection layer 104, 104': Second connection layer 200: Electronic component stacking structure 202: First Electronic Component 204: Second electronic component 206: Third Electronic Component 300, 300': First conductive pillar 400, 400': Second conductive post 500, 500': Add-on structure CV: Conductive via d: Spacing D1, D1': First direction D2: Second Direction L1, L2: Length M1, M2: Diameter P1, P1': First bonding pad P2, P2': Second bonding pad P3: Third junction pad R1, R2: Distance SW, SW': sidewall US: Upper surface

Claims

1. A method for manufacturing a circuit board assembly, comprising: An electronic component stack structure is provided, wherein the electronic component stack structure has a sidewall; a substrate is provided, wherein the substrate has a surface and a through hole; the electronic component stack structure is disposed in the through hole; after the electronic component stack structure is disposed in the through hole, a photoresist layer is attached to the surface; a first opening and a second opening are formed in the photoresist layer to expose the sidewall; a first conductive pillar is formed in the first opening and a first conductive portion is formed in the second opening; after forming the first conductive pillar and the first conductive portion, a second conductive portion is formed in the second opening, and the second conductive portion is connected to the first conductive portion to form a second conductive pillar, wherein the first conductive pillar and the second conductive pillar are connected to the sidewall, and the length of the second conductive pillar is greater than the length of the first conductive pillar; an initial circuit board is provided, wherein the initial circuit board has a stepped opening and includes a first connection layer and a second connection layer; and the electronic component stack structure, the first conductive pillar and the second conductive pillar are disposed in the stepped opening, wherein the first conductive pillar is electrically connected to the first connection layer, and the second conductive pillar is electrically connected to the second connection layer. The method for manufacturing the circuit board assembly as described in claim 1 further includes: Stacking and molding a first electronic component, a second electronic component, and a third electronic component to form an initial electronic component stack structure; and grinding the initial electronic component stack structure to form the electronic component stack structure, wherein the first electronic component includes a first pad exposed on the sidewall, the second electronic component includes a second pad exposed on the sidewall, and the first conductive post and the second conductive post are respectively connected to the first pad and the second pad. The method for manufacturing a circuit board assembly as described in claim 1, wherein the step of forming the second conductive post includes: After the first conductive pillar and the first conductive portion are formed, a shielding layer is attached to cover the first opening. After the shielding layer is attached, a second conductive portion is formed in the second opening, and the second conductive portion is connected to the first conductive portion to form the second conductive post. The method for manufacturing the circuit board assembly as described in claim 1 further includes: After the electronic component stack structure, the first conductive pillar and the second conductive pillar are disposed in the stepped opening, an add-on structure is laminated to cover the stepped opening to form a circuit board. The method of manufacturing a circuit board assembly as described in claim 1, wherein the stepped opening includes a bottom, a middle portion and an opening, the middle portion being located between the bottom and the opening, and the width of the opening being greater than the width of the middle portion, and the width of the middle portion being greater than the width of the bottom. The method for manufacturing the circuit board assembly as described in claim 1 further includes: Before placing the electronic component stack structure, the first conductive post, and the second conductive post into the stepped opening, a solder ball is placed on the first connection line layer and the second connection line layer, respectively, wherein the first conductive post and the second conductive post are electrically connected to the first connection line layer and the second connection line layer through the solder ball. A circuit board assembly, comprising: A circuit board includes: a first interconnect layer; and a second interconnect layer disposed on the first interconnect layer; an electronic component stack structure disposed in the circuit board and having a sidewall, and including: a first electronic component electrically connected to the first interconnect layer; and a second electronic component disposed on the first electronic component and electrically connected to the second interconnect layer; a first conductive post disposed on the sidewall and extending in a first direction away from the sidewall, and electrically connected to the first electronic component and the first interconnect layer; and a second conductive post disposed on the sidewall and extending in the first direction, wherein the second conductive post is located on the first conductive post and electrically connected to the second electronic component and the second interconnect layer, wherein in the first direction, the distance between the first interconnect layer and the sidewall is less than the distance between the second interconnect layer and the sidewall, and the length of the first conductive post is less than the length of the second conductive post. The circuit board assembly as described in claim 7, wherein the electronic component stack structure has an upper surface and further includes: A third electronic component is disposed on the second electronic component and includes a third pad, wherein the third pad is exposed on the upper surface. The circuit board assembly as described in claim 8, wherein the circuit board further comprises: An add-in structure is disposed on the third electronic component and has a conductive via, wherein the conductive via is disposed on the third pad and electrically connected to the third pad. The circuit board assembly as described in claim 7, wherein the second conductive post includes a first conductive portion and a second conductive portion connected to the first conductive portion, and a boundary exists between the first conductive portion and the second conductive portion.

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