Method for forming semiconductor structure
TW202633070APending Publication Date: 2026-08-01WINBOND ELECTRONICS CORP
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Patent Information
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- WINBOND ELECTRONICS CORP
- Filing Date
- 2025-01-24
- Publication Date
- 2026-08-01
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Abstract
The present disclosure provides a method for forming a semiconductor structure, which includes following steps. Bit line structures are formed in the substrate. Each bit line structure includes a bit line and a capping layer formed thereon and protruding over a top surface of the substrate. First spacers are formed on opposite sidewalls of each bit line structure. A second spacer layer covering the first spacers and a top surface of the capping layer is formed on the opposite sidewalls of each bit line structure. Third spacers covering the second spacer layer are formed on the opposite sidewalls of each bit line structure on the top surface of the substrate. A conductive pad layer covering the bit line structures, the third spacers, the second spacer layer and the first spacers is formed on the top surface of the substrate. The conductive pad layer is patterned to form conductive pad structures.
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