Three-dimensional semiconductor device

Abstract

A three-dimensional semiconductor device includes a semiconductor pattern spaced apart from a substrate that extends in a first direction parallel to a bottom surface of the substrate, a word line that at least partially encloses the semiconductor pattern and extends in a second direction, which is parallel to the bottom surface of the substrate and is orthogonal to the first direction, and a bit line on a first side surface of the semiconductor pattern that extends in a third direction perpendicular to the bottom surface of the substrate. The word line includes a gate dielectric layer that at least partially encloses the semiconductor pattern and a gate electrode on the gate dielectric layer, and the gate electrode may include a metal liner pattern and a gate electrode pattern on a side surface of the metal liner pattern. The metal liner pattern may have a U-shaped structure.

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