Memory device and method of manufacturing a memory device

Abstract

A memory device including a memory array and a method of manufacturing a memory device are provided. The memory array includes memory cells disposed in an array having multiple rows and multiple columns and a source line. Each memory cell includes a substrate, a gate structure in the substrate, a source, and a drain. The source and the drain are disposed on two sides of the gate structure along a first direction. The memory array defines a source lead-out region that includes a source contact line extending along the first direction. The source contact line is connected to common sources distributed along the first direction. Each common source is connected to the sources in a same row along a second direction perpendicular to the first direction. The source line is disposed on the source contact line, extends along the second direction, and is connected to the source contact line.

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