Semiconductor memory devices and their control methods
TW202633083APending Publication Date: 2026-08-01KIOXIA CORP
View PDF 0 Cites 0 Cited by
Patent Information
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-06-13
- Publication Date
- 2026-08-01
Smart Images

Figure TWG2TA001070145_001 
Figure TWG2TA001070145_002 
Figure TWG2TA001070145_003
Abstract
The present invention provides a semiconductor memory device that operates appropriately. The semiconductor memory device includes: a plurality of semiconductor layers, which are stacked along a stacking direction and extend in a first direction; a plurality of conductive layers, which extend in a second direction and are connected to the ends of the plurality of semiconductor layers in the first direction; a plurality of via electrodes, which are arranged along the side surfaces of the plurality of semiconductor layers in the second direction in the first direction and whose diameter increases from a first position to a second position in the stacking direction; and a plurality of charge storage layers, which are disposed between the plurality of semiconductor layers and the plurality of via electrodes. Furthermore, at the first point of programming, a first voltage or a second voltage greater than the first voltage is supplied to a plurality of first conductive layers disposed within the range from the first position to the third position in the stacking direction, and a third voltage greater than the first voltage and less than the second voltage, or a fourth voltage greater than the third voltage, is supplied to a plurality of second conductive layers disposed within the range from the second position to the fourth position in the stacking direction. In this state, a programming voltage is supplied to a via electrode.
Need to check novelty before this filing date? Find Prior Art