Voltage-tunable polysilicon resistor and operation method thereof

Abstract

A voltage-tunable polysilicon resistor includes a semiconductor substrate, a device isolation structure, at least one polysilicon resistor structure, a polysilicon control layer and a dielectric layer, wherein the device isolation structure is disposed in the semiconductor substrate to define an active area. The polysilicon resistor structure is disposed on the active area. The polysilicon control layer is disposed on the polysilicon resistor structure, and the polysilicon control layer is coupled to a control voltage source to modulate the resistance value of the polysilicon resistor structure. The dielectric layer is disposed between the polysilicon control layer and the polysilicon resistor structure.

Description

Technical Field

[0001] This invention relates to a semiconductor resistor technology, and more particularly to a voltage-adjustable polysilicon resistor and its operating method. Prior Technology

[0002] CMOS integrated circuits typically use polysilicon to fabricate on-chip resistors. However, when large resistances are required, such as KΩ to GΩ, these resistors often occupy a considerable amount of chip layout area. Summary of the Invention

[0003] This invention provides a voltage-adjustable polycrystalline silicon resistor that can effectively achieve a large resistance element in a limited layout space.

[0004] The present invention also provides a method for operating a voltage-adjustable polycrystalline silicon resistor, which can change the resistance value of the resistor by voltage.

[0005] This invention discloses a voltage-adjustable polysilicon resistor, comprising a semiconductor substrate, a component isolation structure, at least one polysilicon resistor structure, a polysilicon control layer, and a dielectric layer. The component isolation structure is disposed within the semiconductor substrate to define an active region. The polysilicon resistor structure is disposed on the active region. The polysilicon control layer is disposed on the polysilicon resistor structure and coupled to a control voltage source to modulate the resistance value of the polysilicon resistor structure. The dielectric layer is disposed between the polysilicon control layer and the polysilicon resistor structure.

[0006] In one embodiment of the present invention, the above-mentioned element isolation structure and the above-mentioned polysilicon resistor structure extend along a first direction, and the above-mentioned polysilicon control layer extends along a second direction, and the second direction is different from the first direction.

[0007] In one embodiment of the present invention, the dielectric layer includes a silicon oxide layer, a silicon nitride layer, a high-k material layer, or an oxide-nitride-oxide (ONO) structure.

[0008] In one embodiment of the present invention, the number of the above-mentioned polycrystalline silicon resistor structures is several polycrystalline silicon resistor structures, and the above-mentioned polycrystalline silicon control layer extends onto the dielectric layer between the several polycrystalline silicon resistor structures.

[0009] In one embodiment of the present invention, the bottom surface of the polycrystalline silicon control layer is lower than the top surface of the plurality of polycrystalline silicon resistor structures.

[0010] In one embodiment of the present invention, the voltage-adjustable polysilicon resistor may further include several first contact windows that directly contact the polysilicon control layer to couple the polysilicon control layer to a control voltage source via the first contact windows.

[0011] In one embodiment of the present invention, the voltage-adjustable polycrystalline silicon resistor may further include several second contact windows, which respectively contact the two ends of the polycrystalline silicon resistor structure.

[0012] The present invention discloses an operating method for a voltage-adjustable polysilicon resistor, wherein the voltage-adjustable polysilicon resistor comprises a semiconductor substrate having a component isolation structure and an active region defined by the component isolation structure, a polysilicon resistor structure disposed on the active region, a dielectric layer disposed on the polysilicon resistor structure, and a polysilicon control layer disposed on the dielectric layer and covering the polysilicon resistor structure. The operating method includes coupling a first end of the polysilicon resistor structure to a first node, coupling a second end of the polysilicon resistor structure to a second node, and applying a control voltage to the polysilicon control layer to modulate the resistance value of the polysilicon resistor structure.

[0013] In another embodiment of the present invention, the greater the control voltage, the greater the resistance value of the polycrystalline silicon resistor structure.

[0014] In another embodiment of the present invention, the resistance value of the polycrystalline silicon resistor structure refers to the resistance value between the first node and the second node.

[0015] In another embodiment of the present invention, the resistance value of the above-mentioned polycrystalline silicon resistor structure can increase by 10 to 10⁸ times before and after the application of the control voltage.

[0016] Based on the above, the voltage-adjustable polysilicon resistor of the present invention, through a polysilicon resistor structure combined with a polysilicon control layer, can achieve high-resistance operation by utilizing voltage modulation, and thus can effectively achieve a high-resistance element in a limited layout space. Moreover, the voltage-adjustable polysilicon resistor of the present invention can be integrated with existing flash memory processes, thereby reducing process costs and complexity.

[0017] To make the above features of the present invention more apparent and understandable, specific embodiments are described below, and detailed descriptions are provided in conjunction with the accompanying drawings. Simple Explanation of the Diagram

[0018] Figure 1 is a top view of a voltage-adjustable polysilicon resistor according to an embodiment of the present invention. Figure 2 is a cross-sectional view of a voltage-adjustable polycrystalline silicon resistor along line II-II' in Figure 1. Figure 3 is a cross-sectional view of a voltage-adjustable polycrystalline silicon resistor along line III-III' in Figure 1. Figure 4A is a schematic diagram of the operation of a voltage-adjustable polysilicon resistor according to another embodiment of the present invention. Figure 4B is the equivalent circuit diagram of the voltage-adjustable polycrystalline silicon resistor in Figure 4A. Figure 5 is a current-voltage (IV) curve of a voltage-adjustable polysilicon resistor according to some embodiments of the present invention. Figure 6 is a resistance-voltage (RV) curve of a voltage-adjustable polysilicon resistor according to some embodiments of the present invention. Figures 7A to 7C are cross-sectional views of the manufacturing process of a voltage-adjustable polysilicon resistor according to another embodiment of the present invention. Implementation

[0019] Figure 1 is a top view of a voltage-adjustable polycrystalline silicon resistor according to an embodiment of the present invention. Figure 2 is a cross-sectional view of the voltage-adjustable polycrystalline silicon resistor along line II-II' in Figure 1. Figure 3 is a cross-sectional view of the voltage-adjustable polycrystalline silicon resistor along line III-III' in Figure 1.

[0020] Referring to Figures 1, 2, and 3, the voltage-adjustable polysilicon resistor of this embodiment includes at least a semiconductor substrate 100, a component isolation structure 102, a polysilicon resistor structure 104, a polysilicon control layer 106, and a dielectric layer 108. The semiconductor substrate 100 is, for example, a silicon substrate or other suitable semiconductor substrate. The component isolation structure 102 is disposed within the semiconductor substrate 100 to define the active region AA, wherein the component isolation structure 102 is, for example, but not limited to, shallow trench isolation (STI), deep trench isolation (DTI), etc. The polysilicon resistor structure 104 is disposed on the active region AA, and three polysilicon resistor structures 104 are shown in Figures 1 and 2, but the invention is not limited thereto; in other embodiments, the number of polysilicon resistor structures 104 may be one, two, or more than three. In addition, an insulating layer 110 may be provided between the semiconductor substrate 100 and the polysilicon resistor structure 104, wherein the insulating layer 110 is, for example, but not limited to, an insulating material layer such as a silicon oxide layer.

[0021] Referring again to Figures 2 and 3, the polysilicon control layer 106 is disposed on the polysilicon resistor structure 104, and the dielectric layer 108 is disposed between the polysilicon control layer 106 and the polysilicon resistor structure 104. In some embodiments, the dielectric layer 108 may be, for example, but not limited to, a silicon oxide layer, a silicon nitride layer, a high-k material layer, or an oxide-nitride-oxide (ONO) structure. The dielectric layer 108 is conformally compatible with the polysilicon resistor structure 104 and the component isolation structure 102. Therefore, the polysilicon control layer 106 covering the dielectric layer 108 fills the space between adjacent polysilicon resistor structures 104, making the bottom surface 106b of the polysilicon control layer 106 lower than the top surface 104t of the polysilicon resistor structure 104. This configuration is beneficial for controlling the electric field of the polysilicon resistor structure 104, thereby more efficiently utilizing voltage modulation to change the resistance value of the polysilicon resistor structure 104. The polysilicon control layer 106 is coupled to a control voltage source (not shown) to modulate the resistance value of the polysilicon resistor structure 104.

[0022] In Figure 1, the component isolation structure 102 and the polysilicon resistor structure 104 extend along the Y direction (also referred to as the "first direction"). That is, the component isolation structure 102 is disposed within the semiconductor substrate 100 along the Y direction, thus defining an active region AA extending along the Y direction. The polysilicon resistor structure 104 is formed on the active region AA, and therefore also extends along the Y direction. In this embodiment, the polysilicon resistor structure 104 is an elongated structure extending along the Y direction. The polysilicon control layer 106 may extend along the X direction (also referred to as the "second direction"), meaning the polysilicon resistor structure 104 and the polysilicon control layer 106 extend in different directions, but the invention is not limited to this. In other embodiments, the polysilicon control layer 106 may extend along the Y direction and be disposed on top of the polysilicon resistor structure 104. In this embodiment, the voltage-adjustable polysilicon resistor may further include several first contact windows c1, which directly contact the polysilicon control layer 106 to couple the polysilicon control layer 106 to the control voltage source via the first contact windows c1. In Figures 1 and 3, the voltage-adjustable polysilicon resistor may further include several second contact windows c2, which respectively contact the two ends of the polysilicon resistor structure 104, and the resistance value of the polysilicon resistor structure 104 is approximately the resistance value obtained between the two ends of the polysilicon resistor structure 104 and the second contact windows c2.

[0023] Figure 4A is an operational schematic diagram of a voltage-adjustable polycrystalline silicon resistor according to another embodiment of the present invention, wherein the same component symbols as in the previous embodiment are used to represent the same or similar parts and components, and the relevant content of the same or similar parts and components can also refer to the content of the previous embodiment, and will not be repeated here. Figure 4B is an equivalent circuit diagram of the voltage-adjustable polycrystalline silicon resistor of Figure 4A.

[0024] Please refer to Figures 4A and 4B. The operation method of this embodiment is for the voltage-adjustable polysilicon resistor of the previous embodiment, but the present invention is not limited thereto. The operation method of this embodiment can also be implemented in other polysilicon resistors, but it is necessary to basically have a polysilicon resistor structure disposed on the active region, a dielectric layer disposed on the polysilicon resistor structure, and a polysilicon control layer disposed on the dielectric layer and covering the polysilicon resistor structure.

[0025] The operation method of this embodiment includes coupling the first end of the polysilicon resistor structure 104 to the first node N1, coupling the second end of the polysilicon resistor structure 104 to the second node N2, and applying a control voltage CV to the polysilicon control layer 106 to modulate the resistance value of the polysilicon resistor structure 104. Figure 4A shows three polysilicon resistor structures 104, so one end of the three polysilicon resistor structures 104 can be connected to the first node N1 via the second contact window c2, and the other end of the three polysilicon resistor structures 104 can be connected to the second node N2 via the second contact window c2; that is, the polysilicon resistor structures 104 in the figure are coupled to the first node N1 and the second node N2 in parallel. Therefore, the resistance value of the polysilicon resistor structure 104 refers to the resistance value between the first node N1 and the second node N2. The control voltage CV can be applied via the first contact window c1 on either side of the polysilicon control layer 106, for example, from the first contact window c1 on the left side of the figure, or from the first contact window c1 on the right side of the figure.

[0026] The voltage-adjustable polysilicon resistor described above was simulated using TCAD, yielding the current-voltage (IV) curve shown in Figure 5. This curve shows that the current in the polysilicon resistor structure 104 decreases as the voltage (Vc) applied to the polysilicon control layer 106 increases. Therefore, it can be concluded that the electric field of the polysilicon control layer 106 can control the current in the polysilicon resistor structure 104. Then, based on the IV curve, the resistance-voltage (RV) curve in Figure 6 is derived, showing that a higher voltage applied to the polysilicon control layer 106 results in a higher resistance (R). Therefore, the higher the control voltage in the voltage-adjustable polysilicon resistor of the present invention, the higher the resistance of the polysilicon resistor structure 104. Furthermore, based on the simulation results above, the resistance value of the polycrystalline silicon resistor structure can increase by more than 10 times before and after the application of a control voltage, for example, by more than 10² times, more than 10³ times, more than 10⁴ times, more than 10⁵ times, and even up to 10⁸ times. Therefore, the voltage-adjustable polycrystalline silicon resistor of the present invention can achieve high-resistance operation applications (e.g., KΩ to GΩ operation applications).

[0027] Figures 7A to 7C are cross-sectional views of the manufacturing process of a voltage-adjustable polycrystalline silicon resistor according to another embodiment of the present invention, wherein the same component symbols as in Figure 2 are used to represent the same or similar parts and components, and the relevant content of the same or similar parts and components can also refer to the relevant content in Figure 2, and will not be repeated here.

[0028] In Figure 7A, a device isolation structure 102 can be formed in the semiconductor substrate 100 to define the active region AA. The device isolation structure 102 can be formed, for example, but not limited to, by forming trenches in the semiconductor substrate 100 using photolithography and etching processes, and then depositing insulating materials such as oxides in the trenches. Then, an insulating layer 110 and a polysilicon resistor structure 104 are formed on the active region AA. Moreover, these steps can also be integrated with existing flash memory processes. For example, the insulating layer 110 can be formed in the same way as the gate insulating layer, and the polysilicon resistor structure 104 can be formed in the same way as the floating gate. In addition, the device isolation structure 102 can also be formed after the insulating layer 110 and the polysilicon resistor structure 104 are formed, such that the top surface 102t of the device isolation structure 102 is slightly higher than the insulating layer 110, but this is not a limitation.

[0029] Next, referring to Figure 7B, a dielectric layer 108 is conformally deposited on the polysilicon resistor structure 104 and the device isolation structure 102, such that the dielectric layer 108 covers the top surface 102t of the device isolation structure 102, the top surface 104t of the polysilicon resistor structure 104, and the side surface 104s. Furthermore, this step can also be integrated with existing Flash processes. For example, the dielectric layer 108 can be formed using the same method as forming the inter-gate dielectric layer.

[0030] Next, referring to Figure 7C, a polysilicon control layer 106 covering the polysilicon resistor structure 104 is deposited above the dielectric layer 108. Furthermore, this step can also be integrated with existing Flash processes. For example, the polysilicon control layer 106 can be formed using the same method as forming the control gate.

[0031] In summary, the voltage-adjustable polysilicon resistor of the present invention, through a polysilicon resistor structure combined with a polysilicon control layer, enables high-resistance operation applications using voltage modulation, and thus effectively achieves high-resistance elements (e.g., ~KΩ to GΩ) within a limited layout space. Furthermore, the voltage-adjustable polysilicon resistor of the present invention can be integrated with existing Flash processes, thereby reducing process costs and complexity.

[0032] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

[0033] 100: Semiconductor substrate 102: Component isolation structure 102t, 104t: Top surface 104: Polycrystalline silicon resistor structure 104s: Side view 106: Polycrystalline silicon control layer 106b: Bottom surface 108: Dielectric layer 110: Insulation layer AA: Active Zone c1: First contact window c2: Second contact window CV: Control Voltage N1: First node N2: Second node

Claims

1. A voltage-adjustable polycrystalline silicon resistor, comprising: Semiconductor substrate; A component isolation structure is disposed within the semiconductor substrate to define the active region; A plurality of polycrystalline silicon resistor structures are disposed on the active region; a polycrystalline silicon control layer is disposed on the plurality of polycrystalline silicon resistor structures and coupled to a control voltage source to modulate the resistance value of the plurality of polycrystalline silicon resistor structures; and a dielectric layer is disposed between the polycrystalline silicon control layer and the plurality of polycrystalline silicon resistor structures, wherein the polycrystalline silicon control layer extends onto the dielectric layer between the plurality of polycrystalline silicon resistor structures, and the bottom surface of the polycrystalline silicon control layer is lower than the top surface of the plurality of polycrystalline silicon resistor structures.

2. The voltage-adjustable polysilicon resistor as claimed in claim 1, wherein the element isolation structure and the plurality of polysilicon resistor structures extend along a first direction, the polysilicon control layer extends along a second direction, and the second direction is different from the first direction.

3. The voltage-adjustable polysilicon resistor as claimed in claim 1, wherein the dielectric layer comprises a silicon oxide layer, a silicon nitride layer, a high-k material layer, or an oxide-nitride-oxide (ONO) structure.

4. The voltage-adjustable polysilicon resistor as claimed in claim 1 further includes a plurality of first contact windows that directly contact the polysilicon control layer to couple the polysilicon control layer to the control voltage source via the plurality of first contact windows.

5. The voltage-adjustable polysilicon resistor as claimed in claim 1 further includes a plurality of second contact windows, each contacting one end of the plurality of polysilicon resistor structures.

6. A method of operating a voltage-adjustable polycrystalline silicon resistor as described in any one of claims 1 to 5, the method comprising: The first end of one of the polycrystalline silicon resistor structures is coupled to the first node; The second end of one of the polycrystalline silicon resistor structures is coupled to the second node; and a control voltage is applied to the polycrystalline silicon control layer to modulate the resistance value of the one of the polycrystalline silicon resistor structures.

7. The method of operating the voltage-adjustable polysilicon resistor as claimed in claim 6, wherein the larger the control voltage, the larger the resistance value of the polysilicon resistor structure among the plurality of polysilicon resistor structures.

8. The method of operating a voltage-adjustable polysilicon resistor as claimed in claim 6, wherein the resistance value of one of the plurality of polysilicon resistor structures is the resistance value between the first node and the second node.

9. A method of operating a voltage-adjustable polysilicon resistor as claimed in claim 6, wherein the resistance value of one of the plurality of polysilicon resistor structures increases by 10 to 108 times before and after the application of the control voltage.

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