Semiconductor device

TW202633114AActive Publication Date: 2026-08-01HON YOUNG SEMICON CORP
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Patent Information

Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
HON YOUNG SEMICON CORP
Filing Date
2025-01-15
Publication Date
2026-08-01

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    Figure TWG2TA001069470_003
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Abstract

A semiconductor device includes a substrate and an epitaxial layer over the substrate. The epitaxial layer is divided into an active region, a transition region surrounding the active region, and an edge termination region surrounding the transition region. The epitaxial region includes drift region, a transition doped region, and a termination doped region. The drift region is in the active region, the transition region, and the edge termination region, and has a first conductivity type. The transition doped region is in the transition region, and has a second conductivity type different from the first conductivity type. The transition doped region has a rounded corner, and the corner radius of the rounded corner is at least
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Claims

1. A semiconductor device comprising: a substrate; and an epitaxial layer on the substrate, wherein the epitaxial layer is divided into a device region, a transition region, and an edge termination region, the edge termination region surrounding the transition region and the transition region surrounding the device region, wherein the epitaxial layer comprises: a drift region in the device region, the transition region, and the edge termination region, and having a first conductor type; a transition doped region in the transition region, the transition doped region having a second conductor type different from the first conductor type, wherein the transition doped region has a first rounded corner in a top view, and the radius of the first rounded corner is greater than at least 5 times the thickness of the epitaxial layer; and a first termination doped region in the edge termination region and contacting the transition doped region, the first termination doped region having the second conductor type, wherein the first termination doped region has a second rounded corner in a top view, and the radius of the second rounded corner of the first termination doped region is greater than the radius of the first rounded corner of the transition doped region.

2. The semiconductor device as claimed in claim 1, wherein a distance between an edge of the first terminal doped region away from the transition doped region and an edge of the transition doped region overlapping the first terminal doped region is greater than the thickness of the epitaxial layer.

3. The semiconductor device as claimed in claim 1, wherein the epitaxial layer further comprises: a second terminal doped region in the edge terminal region and in contact with the transition doped region and the first terminal doped region, the second terminal doped region having the second conductor type, and the doping concentration of the second terminal doped region being greater than the doping concentration of the first terminal doped region and less than the doping concentration of the transition doped region.

4. The semiconductor device as claimed in claim 3, wherein the second terminal doped region has a third rounded corner in the top view, and the radius of the third rounded corner is at least 5 times greater than the thickness of the epitaxial layer.

5. The semiconductor device as claimed in claim 3, wherein a depth of the second terminal doped region is greater than a depth of the transition doped region.

6. The semiconductor device as claimed in claim 5, wherein the depth of the second terminal doped region is greater than 0.6 micrometers.

7. The semiconductor device as claimed in claim 3, wherein a distance between an edge of the first terminal doped region away from the transition doped region and an edge of the second terminal doped region away from the transition doped region is greater than the thickness of the epitaxial layer.

8. The semiconductor device as claimed in claim 1, wherein the epitaxial layer further comprises: a plurality of third terminal doped regions, wherein in the edge terminal region, the first terminal doped region is located between the transition doped region and the third terminal doped regions, and each of the third terminal doped regions has a width smaller than the width of the first terminal doped region.

9. The semiconductor device as claimed in claim 8, wherein the width of the third terminal doped region furthest from the first terminal doped region is greater than the width of each of the remaining third terminal doped regions.

10. The semiconductor device of claim 8, wherein the width of the third terminal doped region furthest from the first terminal doped region is smaller than the width of each of the remaining third terminal doped regions.