Ldmos structure and method of manufacturing the same
TW202633116APending Publication Date: 2026-08-01POWERCHIP SEMICON MFG CORP
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Patent Information
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- POWERCHIP SEMICON MFG CORP
- Filing Date
- 2025-01-17
- Publication Date
- 2026-08-01
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Figure TWG2TA001069560_001 
Figure TWG2TA001069560_002 
Figure TWG2TA001069560_003
Abstract
A laterally diffused metal oxide semiconductor (LDMOS) structure includes a substrate, a gate, a gate dielectric layer, a well region, at least one first lightly doped drain (LDD) region, at least one second LDD region, and a source / drain region. The gate is formed on a surface of the substrate, and the gate dielectric layer is disposed between the gate and the substrate. The well region is disposed within the surface of the substrate. The at least one first LDD region is disposed in the well region at one side of the gate, and the at least one second LDD region is disposed in the well region outside the first LDD region. The source / drain region is formed in the second LDD region.
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