Semiconductor device
By integrating aluminum silicate wiring isolation patterns and etch stop films within the semiconductor device's interlayer structures, the challenges of miniaturization are addressed, resulting in enhanced reliability and performance through stable wiring separation.
TW202633174APending Publication Date: 2026-08-01SAMSUNG ELECTRONICS CO LTD
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Patent Information
- Application Number
- TW114144630
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-12-23
- Filing Date
- 2025-11-17
- Publication Date
- 2026-08-01
AI Technical Summary
Technical Problem
As semiconductor devices become increasingly miniaturized, there is a challenge in stably separating wiring structures to maintain device performance and reliability.
Method used
The semiconductor device incorporates a lower wiring structure within a lower interlayer insulating film, featuring a lower barrier film and filler film, and includes wiring isolation patterns made of aluminum silicate, with etch stop films and upper interlayer insulating films to stabilize connections and reduce capacitance and resistance.
Benefits of technology
This configuration enhances the reliability and performance of semiconductor devices by preventing short circuits and reducing wiring resistance, ensuring stable connections and improved integration.
✦ Generated by Eureka AI based on patent content.
Abstract
A semiconductor device includes a lower wiring structure disposed within a lower interlayer insulating film, and the lower wiring structure including a lower barrier film and a lower filling film disposed on the lower barrier film, a wiring isolation pattern extending along an upper surface of the lower interlayer insulating film, in contact with the lower interlayer insulating film, and the wiring isolation pattern including aluminum silicate, an upper interlayer insulating film disposed on the lower wiring structure and the wiring isolation pattern, and an upper wiring structure disposed within the upper interlayer insulating film and connected to the lower wiring structure.
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