Flexible hybrid nanosheet standard cell architecture

Abstract

Various implementations related to the use of nanosheet transistors formed on a substrate are disclosed. A nanosheet transistor includes an active region with a width that defines an active device width for the transistor. Hybrid cell structures are disclosed that implement a column of template cells abutting a column of flexible height cells. Flexible height cells may be placed at specified locations in a design logic to provide improved performance or power optimization at the specified locations.

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