Semiconductor device and method of forming a first cell region of a semiconductor device

Abstract

A semiconductor device includes a first cell region including: adjacent first and second active regions; gate segments including first and second gate segments; and segments in a first metallization (M_1st) layer including adjacent first, second and third M_1st power grid (PG) segments correspondingly configured for first and second reference voltages, the first and second reference voltages being different, the M_1st PG segments aligning to corresponding ones of alpha tracks; top and bottom boundaries of the first cell region aligning to corresponding ones of alpha tracks; the first M_1st PG segment substantially asymmetrically overlapping the first active region; the second M_1st PG segment overlapping the bottom boundary, being adjacent to the second active region and substantially free from overlapping the first and second active regions; and the top boundary being between, and substantially free from overlapping each of the first active region and the third M_1st PG segment.

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