Image sensor
Patent Information
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- POWERCHIP SEMICON MFG CORP
- Filing Date
- 2025-01-22
- Publication Date
- 2026-08-01
AI Technical Summary
Existing CMOS image sensors face challenges in enhancing quantum efficiency (QE) and minimizing noise that affects the dynamic range due to issues with light-shielding layers integrated into wiring, leading to parasitic capacitance and ghosting or flare phenomena.
A light-reflecting layer is disposed on the surface of a trench in the dielectric layer above the floating diffusion region and transfer gate structure to reflect incident light to the photoelectric conversion region, improving QE and preventing diffracted light from reaching the floating diffusion region.
Enhances quantum efficiency and prevents ghosting or flare phenomena by reflecting light to the photoelectric conversion region while isolating the light-reflecting layer from electrical connections, thus improving image sensor performance.
Smart Images

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Abstract
Description
[Technical Field]
[0001] The present invention relates to a semiconductor structure, and more particularly to an image sensor. [Previous Technology]
[0002] Integrated circuits (ICs) for image sensors are widely used in devices such as cameras, mobile phones, and automotive lenses. In recent years, compared to charge-coupled devices (CCDs), complementary metal-oxide-semiconductor (CMOS) image sensors have become increasingly advantageous due to their lower power consumption, smaller size, faster data processing, direct data output, and lower manufacturing cost. Therefore, CMOS image sensors have largely replaced CCD image sensors. Generally, CMOS image sensors can include front-side illuminated (FSI) image sensors and back-side illuminated (BSI) image sensors.
[0003] However, as device size continues to shrink, those skilled in the art continue to minimize noise that affects the dynamic range of CMOS image sensors and continue to maximize the quantum efficiency (QE) of CMOS image sensors.
[0004] For example, in the prior art (US 8,299,475 B2), a light-shielding layer can be formed on the floating diffuser region to prevent diffracted light from incident into the floating diffuser region and causing ghosting or flare phenomena that affect the dynamic range of the image sensor. However, the light-shielding layer in the prior art is integrated into the wiring that electrically connects the floating diffuser region to other active components (such as source follower transistors). That is, the light-shielding layer is not electrically floating. As a result, other defects that may affect the performance of the components may need to be considered, such as defects caused by parasitic capacitance.
[0005] On the other hand, the light-shielding layer in this prior art is used to prevent unwanted light from entering the floating diffusion region and serves as wiring to electrically connect the floating diffusion region to other active components. That is, the position of the light-shielding layer is designed to be close to the floating diffusion region. Therefore, the light-shielding layer is designed to be formed directly on the surface of the transfer gate structure, and then a dielectric layer covering the transfer gate structure and the light-shielding layer, as well as an interconnect layer formed on the dielectric layer, are formed. Therefore, considering the angle of incident light reflection from the photodiode, the light-shielding layer still needs improvement in terms of enhancing the quantum efficiency (QE) of the image sensor. [Summary of the Invention]
[0006] The present invention provides an image sensor, which by disposing a light-reflecting layer on the surface of a first trench formed in a dielectric layer and located above a floating diffusion region and a transfer gate structure, allows light incident on the image sensor to be further reflected to the photoelectric conversion region to improve the quantum efficiency (QE) of the image sensor, and also avoids additional diffracted light from being incident on the floating diffusion region to generate undesirable signals. This avoids the ghosting or flare phenomenon caused by the undesirable signals from affecting the dynamic range of the image sensor.
[0007] One embodiment of the present invention provides an image sensor, which includes a substrate, a transfer gate structure, a dielectric layer, and a light-reflecting layer. The substrate includes a photoelectric conversion region and a floating diffusion region. The transfer gate structure is disposed on the substrate and includes a first side and a second side opposite to each other in a first direction, wherein the first side covers a portion of the photoelectric conversion region, and the second side covers a portion of the floating diffusion region. The dielectric layer is disposed on the substrate and covers the transfer gate structure, wherein the dielectric layer includes a first trench disposed above the floating diffusion region and the transfer gate structure. The light-reflecting layer is disposed on the surface of the first trench.
[0008] In some embodiments, the first ditch includes a first sidewall and a second sidewall opposite to each other in a first direction and a bottom surface connecting the first sidewall and the second sidewall, the first sidewall being above the transfer gate structure and having an angle greater than 90 degrees with the bottom surface.
[0009] In some embodiments, the second sidewall is above the floating diffusion zone and has an angle greater than 90 degrees with the bottom surface.
[0010] In some embodiments, the image sensor further includes conductive contacts and an interconnect layer. The conductive contacts are disposed in the dielectric layer and electrically connected to the floating diffusion region. The interconnect layer is disposed on the dielectric layer, wherein the interconnect layer includes an interlayer dielectric layer and interconnects disposed in the interlayer dielectric layer and electrically connected to the conductive contacts. The interlayer dielectric layer includes a portion disposed in the first trench.
[0011] In some embodiments, the light-reflecting layer is electrically isolated from the interconnects and conductive contacts.
[0012] In some embodiments, the material of the light-reflecting layer includes metal.
[0013] In some embodiments, the conductive contact is spaced apart from the first trench.
[0014] In some embodiments, conductive contacts are disposed in the first trench and spaced apart from the light-reflecting layer.
[0015] In some embodiments, the first ditch includes a ditch pattern extending in a second direction different from the first direction.
[0016] In some embodiments, the first trench includes an annular trench pattern. The annular trench pattern includes a first portion disposed above the floating diffusion region and the transfer gate structure, and a second portion surrounding the photoelectric conversion region. The annular trench pattern includes an inner wall facing the photoelectric conversion region, an outer wall opposite to the inner wall, and a bottom surface connecting the inner wall and the outer wall. The angle between the inner wall and the bottom surface is greater than 90 degrees.
[0017] Based on the above, in the image sensor described above, a light-reflecting layer is disposed on the surface of the first trench formed in the dielectric layer and located above the floating diffusion region and the transfer gate structure. In this way, the light incident on the image sensor can be further reflected to the photoelectric conversion region to improve the quantum efficiency (QE) of the image sensor. Furthermore, the light-reflecting layer can also prevent additional diffracted light from being incident on the floating diffusion region and generating undesirable signals, so as to avoid the ghosting or flare phenomenon caused by the undesirable signals from affecting the dynamic range of the image sensor.
Implementation Method
[0018] The invention is described more fully with reference to the drawings of this embodiment. However, the invention may be embodied in various different forms and should not be limited to the embodiments described herein. The thickness of layers and regions in the drawings is enlarged for clarity. The same or similar reference numerals denote the same or similar elements, which will not be repeated in the following paragraphs.
[0019] It should be understood that when an element is referred to as being "on" or "connected" to another element, it may be directly on or connected to the other element, or there may be an intermediate element. If an element is referred to as being "directly on" or "directly connected" to another element, there is no intermediate element. As used herein, "connection" may refer to a physical and / or electrical connection, and "electrical connection" or "coupling" may mean the presence of other elements between two elements. As used herein, "electrical connection" may include physical connections (e.g., wired connections) and physical disconnections (e.g., wireless connections).
[0020] As used herein, “about,” “approximately,” or “substantially” includes the value mentioned and the average value within an acceptable range of deviations of a particular value that can be determined by one of ordinary skill in the art, taking into account the measurement under discussion and the specific number of errors associated with the measurement (i.e., limitations of the measurement system). For example, “about” may mean within one or more standard deviations of the value, or within ±30%, ±20%, ±10%, ±5%. Furthermore, as used herein, “about,” “approximately,” or “substantially” may be chosen based on optical, etched, or other properties, and a single standard deviation may not be applied to all properties.
[0021] The terminology used herein is for illustrative purposes only and is not intended to limit the scope of this disclosure. In this context, the singular form includes the plural form unless the context otherwise requires.
[0022] FIG1 is a cross-sectional schematic diagram of an image sensor according to an embodiment of the present invention. FIG2 is a top view schematic diagram of an image sensor according to an embodiment of the present invention. In some embodiments, FIG1 may be, for example, a cross-sectional schematic diagram taken along line A-A' of FIG2. For ease of explanation, FIG2 only shows the photoelectric conversion region PD, the floating diffusion region FD, the transfer gate structure TG, the light reflective layer 120, and the conductive contact 130. FIG3A to FIG3E are top view schematic diagrams of image sensors according to different embodiments of the present invention. FIG4 is a top view schematic diagram of the light reflective layer in an image sensor according to another embodiment of the present invention. In some embodiments, FIG4 may be, for example, a cross-sectional schematic diagram taken along line B-B' of FIG3E. For ease of explanation, FIG4 omits the conductive contact 130, the interconnect layer 140, the color filter 150, and the microlens 160 shown in FIG1. FIG5 is a top view schematic diagram of the light reflective layer in an image sensor according to yet another embodiment of the present invention. For ease of explanation, Figure 5 omits the conductive contact 130, the inner interconnect layer 140, the color filter 150, and the microlens 160 shown in Figure 1.
[0023] First, please refer to Figures 1 and 2. The image sensor 10 includes a substrate 100, a transfer gate structure TG, a dielectric layer 110, and a light reflective layer 120.
[0024] The substrate 100 includes a photoelectric conversion region PD and a floating diffusion region FD. The photoelectric conversion region PD and the floating diffusion region FD may be formed in the pixel region defined by the isolation structure 102. The substrate 100 may include a semiconductor substrate or a semiconductor on insulator (SOI) substrate. The semiconductor material in the semiconductor substrate or SOI substrate may include elemental semiconductors, alloy semiconductors, or compound semiconductors. For example, elemental semiconductors may include Si or Ge. Alloy semiconductors may include SiGe, SiGeC, etc. Compound semiconductors may include SiC, group III-V semiconductor materials, or group II-VI semiconductor materials. III-V group semiconductor materials may include GaN, GaP, GaAs, AlN, AlP, AlAs, InN, InP, InAs, GaNP, GaNAs, GaPAs, AlNP, AlNAs, AlPAs, InNP, InNAs, InPAs, GaAlNP, GaAlNAs, GaAlPAs, GaInNP, GaInNAs, GaInPAs, InAlNP, InAlNAs, or InAlPAs. Group II-VI semiconductor materials may include CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, HgS, HgSe, HgTe, CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnSe, CdZnTe, CdHgS, CdHgSe, CdHgTe, HgZnS, HgZnSe, HgZnTe, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe, or HgZnSTe. The semiconductor material may be doped with a dopant of a first conductivity type or a dopant of a second conductivity type complementary to the first conductivity type. For example, the first conductivity type can be P-type, while the second conductivity type can be N-type.
[0025] The isolation structure 102 may be formed in the substrate 100 and may include one or more dielectric materials. The dielectric material may include oxides (e.g., silicon oxide), tetraethyl orthosilicate (TEOS), nitrides (e.g., silicon nitride, silicon oxynitride, etc.), carbides (e.g., silicon carbide, silicon oxycarbide, etc.), or the like. The isolation structure 102 may be, for example, a shallow trench isolation structure, but is not limited thereto.
[0026] The photoelectric conversion region PD can be formed by performing an ion implantation process on the substrate 100. For example, the photoelectric conversion region PD may include multiple doped regions in a direction perpendicular to the surface of the substrate 100 (e.g., direction Z), wherein the interface between the multiple doped regions and each other includes at least one PN junction formed by doping with dopants of different conductivity types.
[0027] The floating diffusion region FD can be formed by an ion implantation process on the substrate 100. In some embodiments, the floating diffusion region FD can be a floating node and can be electrically connected to a source follower transistor (not shown) via the conductive contact 130 and the interconnect layer 140 mentioned later.
[0028] A transfer gate structure TG is disposed on the substrate 100 and includes a first side and a second side opposite to each other in a first direction (e.g., direction Y), wherein the first side covers a portion of the photoelectric conversion region PD, and the second side covers a portion of the floating diffusion region FD. The transfer gate structure TG may correspond to the gate structure of a transfer transistor. In some embodiments, the transfer gate structure TG may include a gate electrode (not shown) formed on the surface of the substrate 100, a gate dielectric layer (not shown) formed between the gate electrode and the substrate 100, and gate gap walls (not shown) formed on opposite sidewalls of the gate electrode. The gate electrode may include any material that can serve as a gate, such as polycrystalline silicon. The gate dielectric layer may include any material that can serve as a gate dielectric layer, such as silicon oxide. The gate gap wall may include any material that can serve as a gate gap wall, such as silicon nitride. In some embodiments, as shown in FIG2, the image sensor 10 may include a gate structure RST disposed on the floating diffusion region FD for resetting the transistor. In some embodiments, the gate structure RST may include a gate electrode (not shown) formed on the surface of the substrate 100, a gate dielectric layer (not shown) formed between the gate electrode and the substrate 100, and gate gap walls (not shown) formed on opposite sidewalls of the gate electrode.
[0029] A dielectric layer 110 is disposed on a substrate 100 and covers a transfer gate structure TG, wherein the dielectric layer 110 includes a first trench 110a disposed above a floating diffusion region FD and a transfer gate structure TG. In some embodiments, the first trench 110a may be formed as follows: First, a dielectric material layer covering the transfer gate structure TG is formed on the substrate 100. Next, a mask pattern (not shown) is formed on the dielectric material layer to define the pattern of the first trench 110a to be subsequently formed in the dielectric material layer. Then, a portion of the dielectric material layer exposed by the mask pattern is removed to form the first trench 110a. After the first trench 110a is formed, the mask pattern is removed. The dielectric layer 110 may include any suitable dielectric material, such as silicon oxide.
[0030] A light-reflecting layer 120 is disposed on the surface of the first trench 110a. In this way, light incident on the image sensor 10 (e.g., light L1) can be further reflected to the photoelectric conversion region PD to improve the quantum efficiency (QE) of the image sensor 10. Furthermore, the light-reflecting layer 120 can prevent additional diffracted light from incident into the floating diffusion region FD, thus avoiding unwanted signals and preventing ghosting or flare phenomena caused by these unwanted signals from affecting the dynamic range of the image sensor 10. In some embodiments, the light-reflecting layer 120 may comprise a metallic material.
[0031] In some embodiments, the first trench 110a may include a first sidewall and a second sidewall opposite to each other in a first direction (e.g., direction Y) and a bottom surface connecting the first sidewall and the second sidewall, wherein the first sidewall is above the transfer gate structure TG and the angle θ between the first sidewall and the bottom surface is greater than 90 degrees. In this way, the light-reflecting layer 120 formed on the first sidewall of the first trench 110a can reflect the light reflected thereon (e.g., light L1) back to the photoelectric conversion region PD, thereby improving the quantum efficiency (QE) of the image sensor 10. For example, light incident on the image sensor 10 (e.g., light L1) may include a portion that illuminates the transfer gate structure TG and is reflected to the light reflective layer 120. This portion of light can then be reflected again to the photoelectric conversion region PD via the light reflective layer 120 formed on the first sidewall of the first trench 110a. Alternatively, light incident on the image sensor 10 (e.g., light L1) may include a portion that illuminates the photoelectric conversion region PD and is reflected to the light reflective layer 120. This portion of light can then be reflected again to the photoelectric conversion region PD via the light reflective layer 120 formed on the first sidewall of the first trench 110a. In some embodiments, the second sidewall of the first trench 110a is above the floating diffusion region FD and forms an angle greater than 90 degrees with the bottom surface.
[0032] In some embodiments, the first ditch 110a may include a ditch pattern extending in a second direction (e.g., direction X) different from the first direction (e.g., direction Y). In some embodiments, the first direction may intersect the second direction, for example, the first direction may be perpendicular to the second direction.
[0033] The light reflective layer 120 may be formed in a shape corresponding to the trench pattern, as shown in FIG2. In the top view, the light reflective layer 120 may be a rectangular pattern extending in a second direction (e.g., direction X), but its shape is not limited to the shape shown in FIG2.
[0034] In some embodiments, as shown in FIG3A, the light reflective layer 220 may include a first portion 220a and a second portion 220b, wherein the first portion 220a and the second portion 220b may be rectangular patterns extending in a second direction (e.g., direction X), wherein the width of the first portion 220a in the first direction (e.g., direction Y) is greater than the width of the second portion 220b in the first direction.
[0035] In some other embodiments, as shown in FIG3B, the light reflective layer 320 may include a first portion 320a and a second portion 320b. The first portion 320a may be a rectangular pattern extending in a second direction (e.g., direction X) and having a constant width in the first direction (e.g., direction Y) along the second direction, while the second portion 320b may be a triangular pattern extending in the second direction and having a gradually decreasing width in the first direction along the second direction.
[0036] In some alternative embodiments, as shown in FIG3C, the light reflective layer 420 may be a trapezoidal pattern extending in a second direction (e.g., direction X), wherein the long side of the trapezoidal pattern is disposed on the side adjacent to the photoelectric conversion region PD, and the short side of the trapezoidal pattern is disposed on the side adjacent to the floating diffusion region FD.
[0037] In some other embodiments, as shown in FIG3D, the light reflective layer 520 may be a rectangular pattern extending in a second direction (e.g., direction X) and having an opening therein, wherein the conductive contact 130, which will be mentioned later, may be disposed in the opening such that the light reflective layer 520 is electrically isolated from the conductive contact 130.
[0038] In some other embodiments, as shown in FIG3E, the light-reflecting layer 620 may be an annular pattern, comprising a first portion 620a disposed above the floating diffusion region FD and the transfer gate structure TG, and a second portion 620b surrounding the photoelectric conversion region PD, which may help improve the quantum efficiency (QE) of the image sensor. In this embodiment, the first trench 110a shown in FIG1 may correspond to the light-reflecting layer 620 and include an annular trench pattern. The annular trench pattern may include a first portion disposed above the floating diffusion region FD and the transfer gate structure TG (corresponding to the first portion 620a of the light-reflecting layer 620) and a second portion surrounding the photoelectric conversion region PD (corresponding to the second portion 620b of the light-reflecting layer 620). In this embodiment, as shown in FIG3E and FIG4, the annular trench pattern may include an inner sidewall facing the photoelectric conversion region PD, an outer sidewall opposite to the inner sidewall, and a bottom surface connecting the inner sidewall and the outer sidewall, and the angle between the inner sidewall and the bottom surface is greater than 90 degrees. In this way, the light-reflecting layer 620 can reflect the light reflected onto it back to the photoelectric conversion region PD, which helps to improve the quantum efficiency (QE) of the image sensor.
[0039] In some other embodiments, as shown in FIG5, the first trench 110a may have an arc-shaped profile, such that the light-reflecting layer 720 formed thereon also has an arc-shaped profile corresponding to the first trench 110a.
[0040] In some embodiments, the image sensor 10 may further include conductive contacts 130 disposed in the dielectric layer 110 and an interconnect layer 140 disposed on the dielectric layer 110. The conductive contacts 130 may be electrically connected to the floating diffusion region FD. The interconnect layer 140 may include an interlayer dielectric layer 142 and interconnects 144 disposed in the interlayer dielectric layer 142 and electrically connected to the conductive contacts 130. In some embodiments, the interlayer dielectric layer 142 may include a portion disposed in the first trench 110a.
[0041] The conductive contact 130 may include a conductive material, such as a metallic material like copper, tungsten, ruthenium, or aluminum. The interlayer dielectric layer 142 may include one or more dielectric layers. In some embodiments, the interlayer dielectric layer 142 may include an insulating material, such as silicon dioxide, SiCOH, fluorosilicate glass, phosphate glass (e.g., borosilicate glass), or one or more of the like. The interconnect 144 may include one or more conductive layers formed in the interlayer dielectric layer 142. The conductive layer may include a metallic material such as copper, tungsten, ruthenium, or aluminum.
[0042] The light-reflecting layer 120 may be electrically floating. For example, the light-reflecting layer 120 may be electrically isolated from the interconnect 144 and the conductive contact 130. In some embodiments, the conductive contact 130 may be spaced apart from the first trench 110a (as shown in Figures 2, 3A, 3B, 3C, and 3E). In other embodiments, the conductive contact 130 may be disposed in the first trench 110a and spaced apart from the light-reflecting layer 520 (as shown in Figure 3D).
[0043] In some embodiments, the image sensor 10 may further include a color filter 150 disposed on the interconnect layer 140. The color filter 150 is formed of a material that allows radiation (e.g., light) with a specific wavelength range to pass through while blocking light with wavelengths outside the specified range. In some embodiments, the color filter 150 may be formed of a monomer, polymer, or the like.
[0044] In some embodiments, the image sensor 10 may further include a microlens 160 disposed on the color filter 150. In some embodiments, the microlens 160 may be formed by depositing microlens material onto the color filter 150 (e.g., by spin coating or deposition process). A microlens template (not shown) having a curved upper surface is patterned over the microlens material. The microlens template may include photoresist material exposed using a distributed exposure dose (e.g., for negative photoresist, more light is exposed at the bottom of the curvature and less light is exposed at the top of the curvature), developed, and baked to form a circular shape. The microlens 160 is then formed by selectively etching the microlens material according to the microlens template.
[0045] In summary, in the image sensor of the above embodiments, the light reflection layer is disposed on the surface of the first trench formed in the dielectric layer and located above the floating diffusion region and the transfer gate structure. In this way, the light incident on the image sensor can be further reflected to the photoelectric conversion region to improve the quantum efficiency (QE) of the image sensor. In addition, the light reflection layer can also prevent additional diffracted light from being incident on the floating diffusion region and generating undesirable signals, so as to avoid the ghosting or flare phenomenon caused by the undesirable signals from affecting the dynamic range of the image sensor. [Simplified Explanation of the Diagram]
[0046] Figure 1 is a cross-sectional schematic diagram of an image sensor according to an embodiment of the present invention. Figure 2 is a top view schematic diagram of an image sensor according to an embodiment of the present invention. Figures 3A to 3E are top view schematic diagrams of image sensors according to different embodiments of the present invention. Figure 4 is a top view schematic diagram of a light-reflecting layer in an image sensor according to another embodiment of the present invention. Figure 5 is a top view schematic diagram of a light-reflecting layer in an image sensor according to yet another embodiment of the present invention.
Claims
1. An image sensor, comprising: The substrate includes the photoelectric conversion region and the floating diffusion region; A transfer gate structure is disposed on the substrate and includes a first side and a second side opposite to each other in a first direction, wherein the first side covers a portion of the photoelectric conversion region and the second side covers a portion of the floating diffusion region; a dielectric layer is disposed on the substrate and covers the transfer gate structure, wherein the dielectric layer includes a first trench disposed above the floating diffusion region and the transfer gate structure; a light-reflecting layer is disposed on the surface of the first trench; a conductive contact is disposed in the dielectric layer and electrically connected to the floating diffusion region; and an interconnect layer is disposed on the dielectric layer, wherein the interconnect layer includes an interlayer dielectric layer and an interconnect disposed in the interlayer dielectric layer and electrically connected to the conductive contact, wherein the interlayer dielectric layer includes a portion disposed in the first trench.
2. The image sensor as claimed in claim 1, wherein the first trench includes a first sidewall and a second sidewall opposite to each other in the first direction and a bottom surface connecting the first sidewall and the second sidewall, the first sidewall being above the transfer gate structure and having an angle greater than 90 degrees with the bottom surface.
3. The image sensor as claimed in claim 2, wherein the second sidewall is above the floating diffusion region and forms an angle greater than 90 degrees with the bottom surface.
4. The image sensor as claimed in claim 1, wherein the light-reflecting layer is electrically isolated from the interconnects and the conductive contacts.
5. The image sensor as claimed in claim 4, wherein the material of the light-reflecting layer includes metal.
6. The image sensor as claimed in claim 4, wherein the conductive contact is spaced apart from the first trench.
7. The image sensor of claim 4, wherein the conductive contact is disposed in the first trench and spaced apart from the light-reflecting layer.
8. The image sensor as claimed in claim 1, wherein the first trench includes a trench pattern extending in a second direction different from the first direction.
9. The image sensor of claim 1, wherein the first trench includes an annular trench pattern, the annular trench pattern including a first portion disposed above the floating diffusion region and the transfer gate structure and a second portion surrounding the photoelectric conversion region, the annular trench pattern including an inner wall facing the photoelectric conversion region, an outer wall opposite to the inner wall, and a bottom surface connecting the inner wall and the outer wall, the angle between the inner wall and the bottom surface being greater than 90 degrees.