Semiconductor die assembly and method of manufacturing the same

Abstract

A semiconductor die assembly and method of manufacturing the same are provided. The method includes steps of receiving a first wafer comprising a first semiconductor device and a first interconnect structure disposed over and coupled to the first semiconductor device; forming a barrier liner on a portion of the first interconnect structure; forming a test pad on the barrier liner; performing a first test on the first semiconductor device through the test pad; forming a first bonding structure over the first interconnect structure; receiving a second wafer comprising a second semiconductor device and a second interconnect structure over and coupled to the second semiconductor device; forming a second bonding structure over the second interconnect structure; bonding the first wafer to the second wafer by connecting the first and second bonding structures to form a wafer assembly; and performing a second test on the wafer assembly.

Images