Substrate having stack via and method of manufacturing the same

Abstract

A substrate having stack via includes a first dielectric layer, a first conductive layer, a first conductive material, a second dielectric layer, a second conductive layer and a second conductive material. The first conductive layer and the first conductive material formed in the first dielectric layer, and the second conductive layer and the second conductive material formed in the second dielectric layer are formed of a stack via. Dielectric material used to form the first and second dielectric layers will not remain in the stack via during manufacturing. Thus, the second conductive layer can be electrically connected to the first conductive material, the contact area between the first conductive layer and the first conductive material and the contact area between the second conductive layer and the second conductive material can satisfy specification requirements for electrical transmission.

Claims

1. A method for manufacturing a substrate having conductive vias, comprising: providing a carrier including an adhesive layer; forming a conductive layer on the adhesive layer; forming a circuit layer on the conductive layer, the circuit layer being a redistributed circuit layer, the circuit layer being electrically connected to the conductive layer; forming a first dielectric layer having at least one first through-hole on the adhesive layer, the first through-hole exposing the circuit layer, the first through-hole including a first opening, a second opening and a first annular wall, the first opening being adjacent to a first lower surface of the first dielectric layer and the circuit layer, the second opening being located on a first upper surface of the first dielectric layer, the first annular wall being located between the first opening and the second opening, the first opening having a first width; A first conductive layer is formed on the first upper surface of the first dielectric layer and in the first through-hole. The first conductive layer has at least a first bottom located at the first opening, a first ring portion located at the first ring wall, and a first receiving space surrounded by the first ring portion. The circuit layer is located between the first bottom of the first conductive layer and the conductive layer, and the first bottom is electrically connected to the circuit layer. A first photoresist layer is formed on the first conductive layer and patterned to form a first filling hole, which exposes the first bottom, the first ring portion, and the first receiving space. A first conductive material is formed in the first receiving space. The first conductive material has a first conductive surface and a second conductive surface. The first bottom is located between the first conductive material and the circuit layer, and the first conductive surface is electrically connected to the first bottom. The first photoresist layer is removed. Using the first conductive material as a mask, the portion of the first conductive layer not covered by the first conductive material is removed. A second dielectric layer is formed covering the first dielectric layer, and at least one second via is formed on the second dielectric layer above the first via, the second via exposing the first conductive material. The second via includes a third opening, a fourth opening, and a second annular wall. The third opening is located between the second opening and the fourth opening and is adjacent to a second lower surface of the second dielectric layer. The fourth opening is located on a second upper surface of the second dielectric layer. The second annular wall is located between the third opening and the fourth opening. The third opening has a third width, which is smaller than the first width. A second conductive layer is formed on the second upper surface of the second dielectric layer and in the second via. The second conductive layer has a second bottom located at the third opening, a second annular portion located at the second annular wall, and a second accommodating space surrounded by the second annular portion. The second bottom is electrically connected to the first conductive material. A second photoresist layer is formed on the second conductive layer, and the second photoresist layer is patterned to form a second filling hole, which exposes the second bottom, the second ring portion, and the second accommodating space; a second conductive material is formed in the second accommodating space, the second conductive material having a third conductive surface and a fourth conductive surface, the third conductive surface being electrically connected to the second bottom; the second photoresist layer is then removed.Using the second conductive material as a mask, the second conductive layer not covered by the second conductive material is removed, so that the first conductive layer in the first through hole, the first conductive material, the second conductive layer in the second through hole, and the second conductive material form a conductive stacked hole; and the carrier and the adhesive layer are removed to expose the first lower surface of the first dielectric layer and the conductive layer, and the first lower surface of the first dielectric layer exposes the conductive layer.

2. The method for manufacturing a substrate with conductive vias as claimed in claim 1, wherein the area of ​​the first bottom is larger than the area of ​​the second bottom.

3. The method for manufacturing a substrate with conductive stacked vias as claimed in claim 1, wherein the area of ​​the first conductive surface is larger than the area of ​​the third conductive surface.

4. A method for manufacturing a substrate having conductive stacked holes as claimed in claim 1, wherein the first annular wall is obliquely located between the first opening and the second opening, and the first annular portion is obliquely formed on the first annular wall.

5. The method of manufacturing a substrate with conductive stacked holes as claimed in claim 4, wherein the second annular wall is obliquely located between the third opening and the fourth opening, and the second ring portion is obliquely formed on the second annular wall.

6. A method for manufacturing a substrate with conductive vias as claimed in claim 1, wherein the first conductive material includes a first conductive portion and a second conductive portion, the first conductive portion being formed in the first accommodating space, the second conductive portion being formed in the first filling via, and after the first photoresist layer is removed, the second conductive portion protrudes from the first upper surface of the first dielectric layer, and then the first conductive layer not covered by the second conductive portion and located on the first upper surface is removed using the second conductive portion as a mask.

7. The method for manufacturing a substrate with conductive vias as claimed in claim 6, wherein the second conductive material includes a third conductive portion and a fourth conductive portion, the third conductive portion being formed in the second accommodating space, the fourth conductive portion being formed in the second filling via, and after the second photoresist layer is removed, the fourth conductive portion protrudes from the second upper surface of the second dielectric layer, and then, the second conductive layer not covered by the fourth conductive portion and located on the second upper surface is removed using the fourth conductive portion as a mask.

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