Integrated circuit, fabricating method thereof, and fabricating method of read-only memory transistor array on metallization stack of integrated circuit

Abstract

In a method for fabricating an integrated circuit, logic circuitry devices are formed in and / or on a semiconductor substrate. A metallization stack is formed on the semiconductor substrate. The metallization stack includes patterned metal layers and vias embedded in a dielectric material. A read-only memory (ROM) transistor array is formed on the metallization stack. The ROM transistor array is electrically connected with vias of the metallization stack. The ROM transistor array may include transistor channels and source and drain lines formed from an amorphous silicon layer that is deposited at a temperature of 450oC or lower. ROM transistor array fabrication steps performed after depositing the amorphous silicon layer may also be performed at a temperature of 450oC or lower.

Images