Manufacturing method of CMOS structure connected to heat dissipation layer

TW202633446APending Publication Date: 2026-08-01AIXTRON AG
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Patent Information

Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
AIXTRON AG
Filing Date
2025-10-21
Publication Date
2026-08-01

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Abstract

The present invention relates to a method for manufacturing a CMOS structure connected to a heat dissipation layer, the method comprising at least the following steps: providing a processed CMOS layer structure after removal of a first substrate which may be present; depositing the heat dissipation layer on a second substrate; and connecting the CMOS layer structure to the heat dissipation layer.
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