Multi-chiplet semiconductor device with redundant data line

Abstract

A semiconductor device includes an interface between first and second chiplets that comprises data lines and a redundant data line. The first and second chiplets include input / output modules each electrically coupled to one of the data lines. Each input / output module of the first chiplet is configured to send data over its corresponding data line to the corresponding input / output module of the second chiplet. In the case of a faulty data line, the corresponding one input / output module can reroute its data to a second input / output module for transmission over its data line, and the second input / output module can reroute its data to a third input / output module for transmission over its data line, and so on, until the last input / output module can reroute its data to the redundant data line for transmission over the redundant data line.

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