device

Porous metal layers with metal films in flip-chip mounting address reliability issues by allowing low-temperature, low-pressure bonding and elastic deformation, improving the reliability and fine-pitch connections of semiconductor devices.

TW202633491APending Publication Date: 2026-08-01SONY SEMICON SOLUTIONS CORP
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Patent Information

Application Number
TW114149864
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2020-07-27
Filing Date
2021-05-20
Publication Date
2026-08-01

AI Technical Summary

Technical Problem

Existing flip-chip mounting methods using bulk gold, copper, or solder bumps face reliability issues due to differences in thermal expansion coefficients between semiconductor substrates and chips, leading to damage or reduced connection strength, especially when high temperatures and pressures are required.

Method used

The use of porous metal layers with metal films for bumps that connect semiconductor substrates and chips, allowing for low-temperature and low-pressure bonding, and elastic deformation to accommodate thermal expansion differences.

Benefits of technology

This approach enhances the reliability of electronic devices by reducing thermal damage and preventing open-circuit faults while enabling fine-pitch connections.

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Abstract

The disclosed electronic device (1) includes a semiconductor substrate (2), a wafer (3), and bumps (4). The coefficient of thermal expansion of the wafer (3) is different from that of the semiconductor substrate (2). The bumps (4) connect bonding pads (21, 31) disposed on the opposing main surfaces of the semiconductor substrate (2) and the wafer (3) to each other. The bumps (4) have a porous metal layer (41) and metal films (42, 43). The metal films (42, 43) are disposed at least between the bonding pads (21) and the porous metal layer (41) of the semiconductor substrate (2) and between the bonding pads (31) and the porous metal layer (41) of the wafer (3), and are disposed on the side of the porous metal layer (41).
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