Circuits and methods for generating bias voltages in substrate clamp circuits
TW202634390APending Publication Date: 2026-08-16NAVITAS SEMICON LTD
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Patent Information
- Application Number
- TW115117261
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-28
- Filing Date
- 2024-12-23
- Publication Date
- 2026-08-16
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Abstract
An electronic device includes a gallium nitride (GaN) substrate having a GaN-based top layer attached to a silicon-based bottom layer, a bidirectional switch formed on the GaN-based top layer and including a first source node, a second source node and a common drain node, a first bias generator circuit arranged to couple the first source node to the silicon-based bottom layer, and a second bias generator circuit arranged to couple the second source node to the silicon-based bottom layer.In one aspect, when a voltage of the first source node is at a higher voltage than the second source node, the first bias generator circuit brings a voltage at the silicon-based bottom layer close to the voltage at the second source node.
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