Chip design method, processing device for executing chip design method, and operation interface of chip design

Abstract

A chip design method includes: identifying a zone surrounding the first cell; selecting a second cell, according to a plurality of first peak current values ​​of a cell group, in the cell group covered by the zone; searching a plurality of accommodation spaces according to a cell area of the second cell; identify a plurality of accommodation space zones, the plurality of accommodation space zones respectively surrounding the accommodation spaces; and moving the second cell to a first accommodation space in the plurality of accommodation space zones according to a plurality of first summation current values of the plurality of accommodation space zones.

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