Motor driver with fail-startup fast restarting mechanism

Abstract

A motor driver with a fail-startup fast restarting mechanism is provided. The motor driver includes a locking circuit and a motor driving circuit. The locking circuit sets a plurality of locking times during which a motor enters a locked state. In particular, the locking circuit sets at least one of the locking times is different from other ones of the locking times. The motor driving circuit stops trying to start up the motor within each of the plurality of locking time.

Description

[Technical Field]

[0001] This invention relates to motor drives, and more particularly to a motor drive with a fast restart mechanism for startup failure. [Previous Technology]

[0002] Electronic products generate heat during operation, especially in enclosed housings or other confined spaces. The heat generated by the circuit components circulates within the housing, heating other circuit components and causing them to overheat and be damaged. Therefore, electronic products must be equipped with fans to cool the circuit components.

[0003] However, sometimes the fan motor fails to start, for example, due to dust or small foreign objects interfering, or even due to an imperfect startup program setting. Once the startup fails, it enters the lock-up / stall protection mechanism, which means that the motor will stop starting for a period of time. Since the traditional motor driver stops starting the motor for a fixed period of time, the efficiency of restarting the motor is poor. [Summary of the Invention]

[0004] To address the shortcomings of existing technologies, the present invention provides a motor driver with a fast restart mechanism for startup failures. The motor driver of the present invention includes a locking circuit and a motor drive circuit. The locking circuit is configured to set multiple locking times for the motor in a locked state. At least one of the multiple locking times has a different length than the others. The motor drive circuit is connected to the locking circuit and the motor. The motor drive circuit is configured to attempt to start the motor during one or more unlocked periods outside the multiple locking times, and to stop attempting to start the motor during each of the multiple locking times.

[0005] As described above, the present invention provides a motor driver with a fast restart mechanism for start-up failures. The motor driver of the present invention can flexibly set the lock-up time length for stopping the motor after each start-up failure, and the multiple lock-up time lengths for stopping the motor after multiple start-up failures can be different from each other. For example, the motor driver of the present invention can set the lock-up time length for the first motor lock-up to be shorter than the lock-up time length for each subsequent motor lock-up, reducing the lock-up time waiting for the second attempt to restart the motor, thus allowing for an earlier second start-up attempt. Therefore, the motor driver of the present invention has a higher success rate for motor start-up compared to conventional motor drivers.

[0006] To further understand the features and technical content of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are for reference and illustration only and are not intended to limit the present invention.

Implementation Method

[0007] The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can understand the advantages and effects of the present invention from the content disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of the present invention. In addition, the accompanying drawings of the present invention are only simple illustrations and are not depictions based on actual dimensions, as stated in advance. The following embodiments will further describe the relevant technical content of the present invention in detail, but the disclosed content is not intended to limit the scope of protection of the present invention. In addition, the term "or" used herein should be interpreted as potentially including any or more combinations of the associated listed items, depending on the actual situation.

[0008] Please refer to Figures 1 and 2, wherein Figure 1 is a block diagram of a motor driver with a start-up failure fast restart mechanism according to the first embodiment of the present invention, and Figure 2 is a waveform diagram of the signal of the motor driver with a start-up failure fast restart mechanism according to the first to fourth embodiments of the present invention.

[0009] The motor driver of the present invention includes a locking circuit 100 and a motor drive circuit 200 as shown in FIG1. ​​The motor drive circuit 200 is connected to the locking circuit 100 and the motor MT.

[0010] As shown in Figure 1, the motor driver of the present invention is applicable to starting motors MT, such as, but not limited to, fan motors MT. The motor MT to which the motor driver of the present invention is applicable includes single-phase motors, three-phase motors, or combinations thereof.

[0011] Sometimes, dust, small foreign objects, or other obstructions may accumulate on the motor MT, interfering with its startup and causing fan startup failure. When the motor MT fails to start smoothly due to obstructions or other factors, both conventional motor drivers and the motor driver of this invention will implement a stall / lock / lock protection mechanism, i.e., stop starting the motor MT for a period of time. This time is the locking time described herein, and when the motor MT stops being started within the locking time, it means that the motor MT is in a locked state.

[0012] It is worth noting that the duration for which a traditional motor driver locks the motor MT is a fixed duration each time, meaning that the multiple locking durations of the motor MT are the same for multiple lock-ups, resulting in unnecessary delays in the start-up time of the motor MT. Therefore, the motor driver of the present invention can flexibly set multiple locking durations for the motor MT to switch to the locked state multiple times, as detailed below.

[0013] The locking circuit 100 of the motor driver of the present invention sets a locking time for the motor MT in a locked state each time, and outputs a locking signal according to the set locking time each time.

[0014] It is worth noting that the locking circuit 100 of the motor driver of the present invention sets at least one of the multiple locking times when the motor MT enters a locked state multiple times to be different from the others. Therefore, the motor driver of the present invention can quickly and smoothly start the motor MT when obstacles or other factors that prevent the motor MT from starting are removed.

[0015] When the motor drive circuit 200 does not receive a locking signal from the locking circuit 100, the motor drive circuit 200 may attempt to start the motor MT. At this time, the motor MT is in an unlocked state, that is, the motor MT can be attempted to be started.

[0016] Conversely, when the motor drive circuit 200 receives a locking signal from the locking circuit 100, the motor drive circuit 200 stops attempting to start the motor MT within a locking time period based on the received locking signal. At this time, the motor MT is in a locked state, that is, the motor MT is stopped from being attempted to be started.

[0017] Please refer to Figures 2 and 7, wherein Figure 2 is a block diagram of a motor driver with a start-up failure fast restart mechanism according to the second embodiment of the present invention; and Figure 7 is a waveform diagram of the signal of the motor driver with a start-up failure fast restart mechanism according to the second to fourth embodiments of the present invention.

[0018] As shown in FIG2, in the second embodiment, the motor driver of the present invention includes a locking circuit 100 and a motor drive circuit 200, wherein the locking circuit 100 includes an attempt start count circuit 101, a lock time length setting circuit 102 and a lock start circuit 103.

[0019] The lock-start circuit 103 is connected to the attempt start count circuit 101, the lock time length setting circuit 102, and the motor drive circuit 200. The motor drive circuit 200 and the attempt start count circuit 101 are connected to the motor MT.

[0020] The attempt count circuit 101 repeatedly detects the data of the motor MT (including the current of the motor MT). Based on the data of the motor MT detected each time, the attempt count circuit 101 determines whether the motor MT was successfully started and counts the cumulative number of failed attempts to start the motor MT, and decides whether to switch the motor MT from an unlocked state to a locked state.

[0021] For example, whenever the motor MT started by the motor drive circuit 200 fails to rotate from an initial position to a target position within a threshold time length for attempting to start, the attempt start count circuit 101 determines that the motor drive circuit 200 has failed to start the motor MT. Alternatively, whenever the number of rotations (e.g., one revolution) of the motor MT started by the motor drive circuit 200 within a threshold time length for attempting to start fails to reach a threshold value for one revolution, the attempt start count circuit 101 determines that the motor drive circuit 200 has failed to start the motor MT.

[0022] The number of times the motor drive circuit 200 attempts to start the motor MT fails is used as an attempt count value, or the length of the attempt to start the motor MT is used as an attempt count value. Based on this attempt count value, a start failure count signal LNC as shown in FIG7 can be generated.

[0023] In a start failure counting signal LNC as shown in Figure 7, the start attempt count circuit 101 counts the start attempt count CN to 1 when the motor drive circuit 200 starts the motor MT for the first time, accumulates the start attempt count CN to 2 when the motor MT is started for the second time, and then accumulates the start attempt count CN to 3 to 6 for the third to sixth start attempts of the motor MT respectively until the start attempt count CN accumulates to 7 when the motor MT is started for the seventh time.

[0024] Whenever a counted attempt to start (e.g., CN=7 as shown in Figure 7) has not yet reached a start failure count threshold (e.g., CN=10 as shown in Figure 7) and the motor MT is successfully started, the attempt to start count circuit 101 may generate a successful start indication signal RTS with a pulse or a first level, such as a high logic level.

[0025] The attempt start count circuit 101 resets the attempt start count value CN contained in a start failure count signal LNC to 0 based on a successful start indication signal RTS having a pulse or a first level, such as a high logic level, and then restarts the count of the number of attempts to start the motor MT from 0 next time.

[0026] The attempt start count circuit 101 can output a start count signal LNC (and a successful start indication signal RTS) containing an attempt start count value CN to the lock start circuit 103.

[0027] When the lock-start circuit 103 determines that the attempt start count value CN contained in the start count signal LNC received from the attempt start count circuit 101 has been reset to 0 before reaching a start failure count threshold, the lock-start circuit 103 determines that the motor MT has started successfully. Alternatively, the lock-start circuit 103 may determine that the motor MT has started successfully based on receiving a successful start indication signal RTS from the attempt start count circuit 101.

[0028] Further, when the locking start circuit 103 determines that the motor MT has been successfully started, the locking start circuit 103 outputs a locking signal LKT with a first level (e.g., a low level). Based on the locking signal LKT with the first level (e.g., a low level), the motor drive circuit 200 does not lock the motor MT, that is, it keeps the motor MT in the unlocked state and does not switch the motor MT to a locked state.

[0029] It is worth noting that whenever the locking start circuit 103 determines that the attempt start count value (e.g., CN=10 as shown in Figure 7) contained in a start count signal LNC received from the attempt start count circuit 101 reaches a start failure count threshold value (e.g., CN=10 as shown in Figure 7) and the motor MT still fails to start, the locking start circuit 103 outputs a locking signal LKT with a second level (e.g., a high level) or a pulse. The motor drive circuit 200 locks the motor MT according to the locking signal LKT with a second level (e.g., a high level) or a pulse, that is, maintains the motor MT from the unlocked state to a locked state.

[0030] As shown in Figure 7, the rising edge of a locking signal LKT is the initial locking time point when the motor MT switches from the unlocked state to the locked state, which is the initial locking time point of a locking time when the motor MT is in the locked state.

[0031] It is worth noting that the locking time length setting circuit 102 included in the motor driver of the present invention can set a locking time length for each of the multiple locking times when the motor MT enters the locking state multiple times, so as to output a locking time signal LTS.

[0032] The locking time length setting circuit 102 of the motor driver of the present invention can set at least one of the multiple locking time lengths of the motor MT when it enters the locking state multiple times to be different from the others. For example, the locking time length setting circuit 102 can set the locking time length of the motor MT when it first enters the locking state to be different from the locking time length of subsequent times it enters the locking state.

[0033] For example, the locking time length setting circuit 102 sets the locking time length when the motor MT first enters the locking state to be equal to a locking time length t1 as shown in Figure 7, and outputs a locking time signal LTS indicating a locking time length t1.

[0034] The locking start circuit 103 sets a locking time length t1 of a locking signal LKT output to the motor drive circuit 200 based on a locking time length t1 indicated by a locking time signal LTS received from the locking time length setting circuit 102, that is, sets the working period / pulse width of a pulse of a locking signal LKT.

[0035] The locking start circuit 103 takes the rising edge of the pulse of the locking signal LKT as the initial locking time point for switching the motor MT to the locked state, and locks the motor MT from this initial locking time point, maintaining the lock for a locking time length t1. The falling edge of the pulse of the locking time signal LTS is the time point at which the locking start circuit 103 stops locking the motor MT, serving as an end locking time point.

[0036] The attempt start count circuit 101 stops counting an attempt start count value CN within a lock time length t1 of a lock signal LKT received from the lock start circuit 103.

[0037] After the locking time length t1 of the locking signal LKT ends, the motor drive circuit 200 attempts to start the motor MT again, and at the same time the attempt count circuit 101 restarts the count of the attempt count value CN.

[0038] The lock time length setting circuit 102 can set multiple reference cumulative counts and their corresponding multiple reference lock time lengths. The multiple reference cumulative counts are multiple cumulative counts of the motor MT switching to the locked state. The multiple reference lock time lengths are multiple lock time lengths for locking the motor MT when the number of times the motor MT switches to the locked state reaches multiple cumulative counts.

[0039] The locking start circuit 103 obtains a reference locking time length corresponding to a reference cumulative number that is the same as the current cumulative number of times the motor MT switches to the locked state, and uses it as a locking time length for the current motor MT switching to the locked state, and outputs a locking signal LKT based on this locking time.

[0040] The motor drive circuit 200 sets the initial locking time point and a locking time length of a locking time for the motor MT to switch to the locked state according to a locking signal LKT received from the start count circuit 101, and locks the motor MT in a locked state accordingly.

[0041] For example, the multiple reference lock time lengths set by the lock time length setting circuit 102 include a first reference lock time length and a second reference lock time length. The lock time length setting circuit 102 sets the lock time length (e.g., the lock time length t0 shown in Figure 7) for the first switch of the motor MT to a lock state (i.e., the reference cumulative number = 1 time) to be equal to the first reference lock time length, and sets the lock time length (e.g., the lock time length t1 shown in Figure 7) for the second and subsequent switches of the motor MT to a lock state to be equal to the second reference lock time length. The first reference lock time length is different from the second reference lock time length; for example, the first reference lock time length is less than the second reference lock time length.

[0042] The lock time length setting circuit 102 can acquire or set a preset lock time length, and can adjust (e.g., shorten) the preset lock time length to form a reference lock time length, which serves as the lock time length for the first (i.e., reference cumulative count = 1) switch of the motor MT to a locked state. The lock time length setting circuit 102 can set the lock time length for the second and subsequent (i.e., reference cumulative count = 2 to N) switch of the motor MT to a locked state to be equal to this preset lock time length.

[0043] Therefore, when the motor drive circuit 200 of the motor driver of the present invention fails to start the motor MT successfully in the first / earliest of multiple unlocked times, the locking time for which the motor drive circuit 200 temporarily stops starting the motor MT is relatively short, so that the motor drive circuit 200 can try to start the motor MT a second time more quickly. However, when the motor MT fails to start successfully in subsequent unlocked times, the locking time length setting circuit 102 determines that the factors causing the start failure cannot be completely eliminated in a short time, such as an increase in the accumulation of dust or other obstacles on the motor MT. In this case, the motor drive circuit 200 waits for a longer locking time before trying to start the motor MT again.

[0044] Please refer to Figures 3 and 6, wherein Figure 3 is a block diagram of a motor driver with a start-up failure fast restart mechanism according to the third embodiment of the present invention, and Figure 6 is a waveform diagram of the signal of the motor driver with a start-up failure fast restart mechanism according to the first to fourth embodiments of the present invention.

[0045] The third embodiment of the present invention is the same as the second embodiment, and will not be repeated here.

[0046] The difference between the third embodiment and the second embodiment of the present invention is that, as shown in FIG3, the motor driver of the third embodiment of the present invention, in addition to including the locking circuit 100 and the motor drive circuit 200, also includes a waveform signal generation circuit 300. The waveform signal generation circuit 300 is connected to the motor drive circuit 200.

[0047] The waveform signal generation circuit 300 outputs multiple start-up pattern waveform signals, wherein each start-up pattern waveform signal has multiple waveforms, which may include multiple sine wave waveforms, multiple third harmonic waveforms, or any combination thereof.

[0048] The motor drive circuit 200 modulates multiple start pattern waveform signals received from the waveform signal generation circuit 300 to form multiple start waveform signals based on the lock signal LKT received from the lock start circuit 103, and drives the motor MT based on the multiple start waveform signals.

[0049] For example, when the motor drive circuit 200 does not receive the lock signal LKT from the lock start circuit 103, the motor drive circuit 200 outputs multiple complete waveforms, such as multiple third harmonic waveforms, from the multiple start waveform signals US, VS, WS shown in FIG6 to the motor MT during the non-lock time, or generates a motor start signal based on the multiple complete waveforms from the multiple start waveform signals US, VS, WS to attempt to start the motor MT.

[0050] Conversely, when the motor drive circuit 200 receives the locking signal LKT from the locking start circuit 103, the motor drive circuit 200 can cut off or remove those bands generated during the locking time from at least one of the multiple waveforms contained in the multiple waveforms of each of the multiple start pattern waveform signals. The motor drive circuit 200 uses the multiple start pattern waveform signals with partially cut-off or removed bands as the multiple start waveform signals US, VS, and WS shown in FIG6. Therefore, as shown in FIG6, each of the multiple start waveform signals US, VS, and WS has an incomplete waveform, such as an incomplete third harmonic waveform.

[0051] In other words, the motor drive circuit 200 stops transmitting a portion of a waveform from each of the multiple bands of the start waveform signals US, VS, WS within a lock time specified by a lock signal LKT received from the lock start circuit 103, so as to stop attempting to start the motor MT.

[0052] Please refer to Figures 4 and 5, where Figure 4 is a block diagram of a motor driver with a start-up failure fast restart mechanism according to the fourth embodiment of the present invention, and Figure 5 is a circuit diagram of the signal output stage circuit and motor configuration of the motor driver with a start-up failure fast restart mechanism according to the fourth embodiment of the present invention. The fourth embodiment of the present invention is the same as the first to third embodiments, and will not be repeated herein.

[0053] In addition to the locking circuit 100, the motor drive circuit 200, and the waveform signal generation circuit 300, the motor driver of the fourth embodiment of the present invention also includes a reference waveform signal generation circuit 400 and a motor detection circuit 500. In practice, the motor detection circuit 500 can be omitted.

[0054] The locking circuit 100 includes an attempt start count circuit 101, a lock time length setting circuit 102, and a lock start circuit 103. The motor drive circuit 200 includes a control circuit 201, a drive circuit 202, and an output stage circuit 203.

[0055] The motor detection circuit 500 is connected to the motor MT and the attempt start count circuit 101. The lock start circuit 103 is connected to the attempt start count circuit 101, the lock time length setting circuit 102, and the waveform signal generation circuit 300. The control circuit 201 is connected to the reference waveform signal generation circuit 400 and the drive circuit 202. The output stage circuit 203 is connected to the drive circuit 202 and the motor MT.

[0056] The motor detection circuit detects the data of the motor MT more than 500 times, including the current MTI of the motor MT as shown in Figure 7.

[0057] The start-up count circuit 101 determines whether the motor MT has successfully started and counts the cumulative number of failed attempts to start the motor MT based on the data detected by the motor detection circuit 500 each time. Based on this, it sets the initial locking time point for switching the motor MT from an unlocked state to a locked state, and outputs a start-up failure count signal LNC.

[0058] The control circuit 201 modulates multiple start-up pattern waveform signals received from the waveform signal generation circuit 300 according to the lock signal LKT received from the lock-up start-up circuit 103 to form multiple start-up waveform signals US, VS, WS as shown in FIG6. Each start-up waveform signal US, VS, WS contains multiple sine wave waveforms, multiple third harmonic waveforms, or any combination thereof.

[0059] The drive circuit 202 outputs multiple drive signals based on the multiple start-up waveform signals US, VS, WS and multiple reference pattern waveform signals received from the control circuit 201. For example, the drive circuit 202 compares the voltage levels of the multiple start-up waveform signals US, VS, WS with the voltage levels of the multiple reference pattern waveform signals to determine the voltage levels of the multiple drive signals respectively.

[0060] The output stage circuit 203 operates according to multiple drive signals received from the drive circuit 202 to output a motor start signal to the motor MT to start the motor MT.

[0061] For example, the output stage circuit 203 shown in FIG4 may include a first upper bridge switch TH1, a first lower bridge switch TL1, a second upper bridge switch TH2, a second lower bridge switch TL2, a third upper bridge switch TH3 and a third lower bridge switch TL3 as shown in FIG5.

[0062] The first terminal of the first upper bridge switch TH1 is coupled to the first input voltage VINU. The second terminal of the first upper bridge switch TH1 is connected to the first terminal of the first lower bridge switch TL1. The second terminal of the first lower bridge switch TL1 is coupled to the first reference potential VGU. The first node NODEU between the second terminal of the first upper bridge switch TH1 and the first terminal of the first lower bridge switch TL1 is connected to the first terminal of the first coil COILU of the first phase (e.g., U phase) of the motor MT, for example, a three-phase motor.

[0063] The first terminal of the second upper bridge switch TH2 is coupled to the second input voltage VINV. The second terminal of the second upper bridge switch TH2 is connected to the first terminal of the second lower bridge switch TL2. The second terminal of the second lower bridge switch TL2 is coupled to the second reference potential VGV. The second node NODEV between the second terminal of the second upper bridge switch TH2 and the first terminal of the second lower bridge switch TL2 is connected to the first terminal of the second coil COILV of the second phase (e.g., V phase) of the motor MT, for example, a three-phase motor.

[0064] The first terminal of the third upper bridge switch TH3 is coupled to the third input voltage VINW. The second terminal of the third upper bridge switch TH3 is connected to the first terminal of the third lower bridge switch TL3. The second terminal of the third bridge switch TL3 is coupled to the third reference potential VGW. The third node NODEW between the second terminal of the third upper bridge switch TH3 and the first terminal of the third lower bridge switch TL3 is connected to the first terminal of the third coil COILW of the third phase (e.g., W phase) of the motor MT, for example, a three-phase motor.

[0065] For example, the second end of the first coil COILU, the second end of the second coil COILV, and the second end of the third coil COILW of a three-phase motor are connected to a common contact COM.

[0066] The control terminals of the first upper bridge switch TH1, the first lower bridge switch TL1, the second upper bridge switch TH2, the second lower bridge switch TL2, the third upper bridge switch TH3, and the third lower bridge switch TL3 are connected to the drive circuit 202 to receive multiple drive signals from the drive circuit 202 respectively.

[0067] Please refer to Figure 8, which is a schematic diagram of multiple locking time lengths corresponding to multiple cumulative locking times of the motor driver with a start failure fast restart mechanism according to the fifth embodiment of the present invention.

[0068] As shown in Figures 2 to 4, the attempt start count circuit 101 accumulates the number of times the motor MT attempts to start, and the lock time length setting circuit 102 sets multiple lock time lengths corresponding to multiple (reference) accumulated counts.

[0069] As shown in Figure 8, the locking time length setting circuit 102 sets the locking time length of the motor MT when it first switches to the locked state (i.e., the cumulative number = 1) to be equal to the first reference locking time length, for example, 0.5 seconds.

[0070] The locking time length setting circuit 102 sets the locking time length of the motor MT when it switches to the locking state for the second time (i.e., the cumulative number of times = 2) to be equal to the second reference locking time length, for example, 1 second.

[0071] The locking time length setting circuit 102 sets the locking time length of the motor MT when it switches to the locked state for the third time (i.e., the cumulative number = 3) to be equal to the third reference locking time length, for example, 1.5 seconds.

[0072] When the lock time length setting circuit 102 sets the lock time length to be equal to the fourth reference lock time length or a preset lock time length, such as 2 seconds, when the cumulative number of times the motor MT switches to the lock state for the fourth to seventh time as shown in Figure 8 is 4 to 7 respectively.

[0073] It is worth noting that the motor driver of the present invention can flexibly set the locking time lengths of the motor MT to be different for each of the multiple switching to the locked state. For example, as shown in FIG8, the fewer the cumulative number of times the motor MT switches to the locked state, the shorter the locking time length; conversely, the more the motor MT switches to the locked state, the longer the locking time length. When the cumulative number of times the motor MT switches to the locked state exceeds a locking number threshold, the locking time length can no longer be increased and can be maintained at a preset locking time length.

[0074] In summary, the present invention provides a motor driver with a fast restart mechanism for start-up failures. The motor driver of the present invention can flexibly set the lock-up time length for stopping the motor after each start-up failure, and the multiple lock-up time lengths for stopping the motor after multiple start-up failures can be different from each other. For example, the motor driver of the present invention can set the lock-up time length for the first motor lock-up to be shorter than the lock-up time length for each subsequent motor lock-up, reducing the lock-up time waiting for the second attempt to restart the motor, thus allowing for an earlier second start-up attempt. Therefore, the motor driver of the present invention has a higher success rate for motor start-up compared to traditional motor drivers.

[0075] The content disclosed above is only a preferred and feasible embodiment of the present invention, and is not intended to limit the scope of the patent application of the present invention. Therefore, all equivalent technical changes made using the contents of the present invention specification and drawings are included in the scope of the patent application of the present invention. [Simplified Explanation of the Diagram]

[0076] Figure 1 is a block diagram of a motor driver with a fast restart mechanism for startup failure according to the first embodiment of the present invention.

[0077] Figure 2 is a block diagram of a motor driver with a fast restart mechanism for startup failure according to a second embodiment of the present invention.

[0078] Figure 3 is a block diagram of a motor driver with a fast restart mechanism for startup failure according to the third embodiment of the present invention.

[0079] Figure 4 is a block diagram of a motor driver with a fast restart mechanism for startup failure according to the fourth embodiment of the present invention.

[0080] Figure 5 is a circuit diagram of the output stage circuit and motor configuration of the motor driver with a start failure fast restart mechanism according to the fourth embodiment of the present invention.

[0081] Figure 6 is a waveform diagram of the signal of the motor driver with a fast restart mechanism for startup failure according to the first to fourth embodiments of the present invention.

[0082] Figure 7 is a waveform diagram of the signal of the motor driver with a start failure fast restart mechanism according to the second to fourth embodiments of the present invention.

[0083] Figure 8 is a schematic diagram of multiple locking time lengths corresponding to multiple cumulative locking times of the motor driver with a start failure fast restart mechanism according to the fifth embodiment of the present invention.

Claims

1. A motor driver with a fast restart mechanism for startup failure, comprising: a locking circuit configured to set a plurality of locking times for a motor in a locked state, wherein at least one of the plurality of locking times has a different length from the others; and a motor drive circuit connected to the locking circuit and the motor, configured to attempt to start the motor during one or more unlocked periods other than the plurality of locking times, and to stop attempting to start the motor during each of the plurality of locking times.

2. A motor driver with a fast restart mechanism for startup failure as described in claim 1, wherein, Whenever the locking circuit determines that the motor drive circuit has failed to start the motor, the motor enters the locked state.

3. A motor driver with a fast restart mechanism for startup failure as described in claim 2, wherein the locking circuit is configured to acquire or detect data of the motor to determine whether the motor drive circuit has failed to start the motor.

4. A motor driver with a fast restart mechanism for startup failure as described in claim 2, wherein, Whenever the motor started by the motor drive circuit fails to rotate from an initial position to a target position within an attempt to start threshold time, the locking circuit determines that the motor drive circuit has failed to start the motor.

5. A motor driver with a fast restart mechanism for startup failure as described in claim 2, wherein, Whenever the motor started by the motor drive circuit fails to reach a certain number of revolutions within a certain threshold time period, the locking circuit determines that the motor drive circuit has failed to start the motor.

6. A motor driver with a fast restart mechanism for startup failure as described in claim 1, wherein the locking circuit is configured to count a cumulative number of failed attempts by the motor drive circuit to start the motor or a startup attempt duration as a startup attempt count value; wherein, When the attempt start count reaches a threshold value for the attempt start time, the motor enters the locked state.

7. A motor driver with a fast restart mechanism for startup failure as described in claim 6, wherein, After the motor drive circuit successfully starts the motor, the locking circuit recounts the attempted start count.

8. A motor driver with a start-up failure fast restart mechanism as described in claim 1, wherein the locking circuit is configured to modulate a preset locking time length to form a reference locking time length as the locking time length of the first time the motor switches to the locked state.

9. A motor driver with a start-up failure fast restart mechanism as described in claim 1, wherein the locking circuit is configured to shorten a preset locking time length to form a reference locking time length, which is the locking time length of the locking time when the motor first switches to the locked state.

10. A motor driver with a start-up failure fast restart mechanism as described in claim 9, wherein the locking circuit is configured to set the locking time length for the second and subsequent switching of the motor to the locked state to be equal to the preset locking time length.

11. A motor driver with a start-up failure fast restart mechanism as described in claim 1, wherein the locking circuit is configured to set the locking time length of the first time the motor switches to the locked state to be equal to a first reference locking time length, and to set the locking time length of the second and subsequent times the motor switches to the locked state to be equal to a second reference locking time length.

12. The motor driver with a fast restart mechanism for startup failure as described in claim 11, wherein the first reference lock-in time length is different from the second reference lock-in time length.

13. A motor driver with a fast restart mechanism for startup failure as described in claim 1, wherein the locking circuit comprises: a startup attempt count circuit configured to determine whether to switch the motor from an unlocked state to the locked state based on an operating state signal of the motor, and to count a cumulative number of times the motor switches from the unlocked state to the locked state; a lockout duration setting circuit connected to the startup attempt count circuit, configured to set a plurality of reference cumulative counts and a plurality of reference lockout durations corresponding to each of them; and a lockout start circuit connected to the startup attempt count circuit, the lockout duration setting circuit, and the motor drive circuit, configured to obtain the reference lockout duration corresponding to the reference cumulative count that is the same as the currently counted cumulative count, as a lockout duration for the current lockout time when the motor switches to the locked state.

14. The motor driver with a fast restart mechanism for startup failure as described in claim 1, further comprising: a waveform signal generation circuit connected to the motor drive circuit, configured to generate a startup pattern waveform signal; wherein the motor drive circuit is configured to modulate the startup pattern waveform signal to form a startup waveform signal based on a plurality of said lock times, and to start the motor based on the startup waveform signal.

15. A motor driver with a fast restart mechanism for startup failure as claimed in claim 14, wherein the motor drive circuit is configured to cut off or remove those bands generated during the lock-in time from at least one of the multiple waveforms of the startup pattern waveform signal to form the startup waveform signal.

16. The motor driver with a fast restart mechanism for startup failure as described in claim 14, wherein the startup pattern waveform signal comprises a plurality of sine wave waveforms, a plurality of third harmonic waveforms, or any combination thereof.

17. A motor driver with a fast restart mechanism for startup failure as described in claim 1, wherein the motor comprises a three-phase motor.

18. A motor driver with a fast restart mechanism for startup failure as described in claim 1, wherein the motor comprises a single-phase motor.

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