Methods for forming low-resistivity interconnect structures comprising ruthenium

TW202634973APending Publication Date: 2026-08-16TOKYO ELECTRON LTD
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Patent Information

Application Number
TW114136340
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-10-01
Filing Date
2025-09-22
Publication Date
2026-08-16

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Patent Text Reader

Abstract

Various embodiments of interconnect structures and methods of forming interconnect structures used in an integrated circuit (IC) device are provided in the present disclosure. More specifically, techniques are provided for forming low-resistivity interconnect structures including a multilayer interconnect film stack comprising a first conductive film formed beneath and in contact with a second conductive film. The presence of the first conductive film within the multilayer interconnect film stack decreases the resistivity of the second conductive film when the second conductive film is deposited onto the first conductive film to provide a low-resistivity interconnect structure.
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