Semiconductor device and methods of formation

TW202634985APending Publication Date: 2026-08-16TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information

Application Number
TW114119491
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-02-03
Filing Date
2025-05-23
Publication Date
2026-08-16

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Abstract

Flowable low-k and ultra low-k dielectric materials may be used as materials for inner spacers to prevent formation of inner spacer defects. A flowable deposition process (e.g., a flowable chemical vapor deposition (FCVD) process) may be used to deposit the flowable low-k and ultra low-k dielectric materials to avoid inner spacer defect formation. Ratios of precursors to reactants used in the flowable deposition process may be tuned to increase flowability to prevent generation of seams and / or voids in the inner spacers. If defect formation is avoided, processes to trim and / or clean nanostructure channel surfaces prior to epitaxial growth of source / drain regions may be performed for a requisite amount of time without concern that defects will be enlarged. Due to the lack of defects in inner spacers formed using the techniques described herein, the inner spacers may provide increased protection from parasitic capacitance between gates and source / drain regions in nanostructure transistors.
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